( go.asm):00001 ******************************************************************************* ( go.asm):00002 * TurbOS ( go.asm):00003 ******************************************************************************* ( go.asm):00004 * See LICENSE.txt for licensing information. ( go.asm):00005 ******************************************************************** ( go.asm):00006 * ( go.asm):00007 * $Id$ ( go.asm):00008 * ( go.asm):00009 * Edt/Rev YYYY/MM/DD Modified by ( go.asm):00010 * Comment ( go.asm):00011 * ------------------------------------------------------------------ ( go.asm):00012 * 1 2023/08/29 BGP ( go.asm):00013 * Created. ( go.asm):00014 ( go.asm):00015 nam go ( go.asm):00016 ttl Very simple initial program ( go.asm):00017 ( go.asm):00018 use defs.d ( defs.d):00001 * Assemble-time capability flags ( defs.d):00002 * ( defs.d):00003 * Feature Flags - eliminating one or more of these capabilities saves code space. ( defs.d):00004 * ( defs.d):00005 * Manage your own interrupts or install interrupt service routines using F$IRQ. 0000 ( defs.d):00006 _FF_IRQ_POLL equ 0 Set to 1 for interrupt service routine polling ( defs.d):00007 ( defs.d):00008 * Use virtual interrupt service routines using F$VIRQ. 0000 ( defs.d):00009 _FF_VIRQ_POLL equ 0 Set to 1 for virtual interrupt service routine polling ( defs.d):00010 ( defs.d):00011 * Wall time gives year/month/date/hour/minute/second support. 0000 ( defs.d):00012 _FF_WALLTIME equ 0 Set to 1 for a software wall time clock ( defs.d):00013 ( defs.d):00014 * Module CRC and header parity checks are useful for integrity, but slows down loading. 0000 ( defs.d):00015 _FF_MODCHECK equ 0 Set to 1 for module header and CRC checking ( defs.d):00016 ( defs.d):00017 * Unified I/O adds a standard device interface at the expense of more memory. 0000 ( defs.d):00018 _FF_UNIFIED_IO equ 0 Set to 1 for unified I/O ( defs.d):00019 ( defs.d):00020 * Booting from an external storage device can bring in additional functionality. 0001 ( defs.d):00021 _FF_BOOTING equ 1 Set to 1 for bootfile loading ( defs.d):00022 ( defs.d):00023 * TurbOS system definitions ( defs.d):00024 use turbos.d ( turbos.d):00001 ******************************************************************************* ( turbos.d):00002 * TurbOS ( turbos.d):00003 ******************************************************************************* ( turbos.d):00004 * See LICENSE.txt for licensing information. ( turbos.d):00005 ******************************************************************************* ( turbos.d):00006 * ( turbos.d):00007 * Edt/Rev YYYY/MM/DD Modified by ( turbos.d):00008 * Comment ( turbos.d):00009 * ---------------------------------------------------------------------------- ( turbos.d):00010 * 2023/08/11 Boisy Pitre ( turbos.d):00011 * Initial creation. ( turbos.d):00012 * ( turbos.d):00013 ******************************************************************************* ( turbos.d):00014 ( turbos.d):00015 ifne TURBOS.D-1 ( turbos.d):00016 0001 ( turbos.d):00017 TURBOS.D set 1 ( turbos.d):00018 ( turbos.d):00019 nam turbos.d ( turbos.d):00020 ttl TurbOS system definitions ( turbos.d):00021 ( turbos.d):00022 * Common definitions 0001 ( turbos.d):00023 true equ 1 0000 ( turbos.d):00024 false equ 0 ( turbos.d):00025 ( turbos.d):00026 pag ( turbos.d):00027 ***************************************** ( turbos.d):00028 * System service request code definitions ( turbos.d):00029 * ( turbos.d):00030 org 0 ( turbos.d):00031 * User and system state calls 0000 ( turbos.d):00032 F$Link rmb 1 link to module 0001 ( turbos.d):00033 F$Load rmb 1 load module from file 0002 ( turbos.d):00034 F$UnLink rmb 1 unlink module 0003 ( turbos.d):00035 F$Fork rmb 1 start new process 0004 ( turbos.d):00036 F$Wait rmb 1 wait for child process to die 0005 ( turbos.d):00037 F$Chain rmb 1 chain process to new module 0006 ( turbos.d):00038 F$Exit rmb 1 terminate process 0007 ( turbos.d):00039 F$Mem rmb 1 set memory size 0008 ( turbos.d):00040 F$Send rmb 1 send signal to process 0009 ( turbos.d):00041 F$Icpt rmb 1 set signal intercept 000A ( turbos.d):00042 F$Sleep rmb 1 suspend process 000B ( turbos.d):00043 F$ID rmb 1 return process ID 000C ( turbos.d):00044 F$SPrior rmb 1 set process priority 000D ( turbos.d):00045 F$SSWI rmb 1 set software interrupt 000E ( turbos.d):00046 F$PErr rmb 1 print Error 000F ( turbos.d):00047 F$PrsNam rmb 1 parse pathlist name 0010 ( turbos.d):00048 F$CmpNam rmb 1 compare two names 0011 ( turbos.d):00049 F$SchBit rmb 1 search bit map 0012 ( turbos.d):00050 F$AllBit rmb 1 allocate in bit map 0013 ( turbos.d):00051 F$DelBit rmb 1 deallocate in bit map 0014 ( turbos.d):00052 F$Time rmb 1 get current time 0015 ( turbos.d):00053 F$STime rmb 1 set current time 0016 ( turbos.d):00054 F$CRC rmb 1 generate CRC ( turbos.d):00055 ( turbos.d):00056 org $27 beginning of system reserved calls ( turbos.d):00057 * System state (privileged) calls 0027 ( turbos.d):00058 F$VIRQ rmb 1 install/delete virtual IRQ 0028 ( turbos.d):00059 F$SRqMem rmb 1 system memory request 0029 ( turbos.d):00060 F$SRtMem rmb 1 system memory return 002A ( turbos.d):00061 F$IRQ rmb 1 enter IRQ polling table 002B ( turbos.d):00062 F$IOQu rmb 1 enter I/O queue 002C ( turbos.d):00063 F$AProc rmb 1 enter active process queue 002D ( turbos.d):00064 F$NProc rmb 1 start next process 002E ( turbos.d):00065 F$VModul rmb 1 validate module 002F ( turbos.d):00066 F$Find64 rmb 1 find process/path descriptor 0030 ( turbos.d):00067 F$All64 rmb 1 allocate process/path descriptor 0031 ( turbos.d):00068 F$Ret64 rmb 1 return process/path descriptor 0032 ( turbos.d):00069 F$SSvc rmb 1 service request table initialization 0033 ( turbos.d):00070 F$IODel rmb 1 delete I/O module ( turbos.d):00071 ( turbos.d):00072 * ( turbos.d):00073 * System calls $70 through $7F are reserved for user definitions ( turbos.d):00074 * ( turbos.d):00075 org $70 0070 ( turbos.d):00076 rmb 16 reserved for user definition ( turbos.d):00077 ( turbos.d):00078 pag ( turbos.d):00079 ************************************** ( turbos.d):00080 * I/O service request code definitions ( turbos.d):00081 * ( turbos.d):00082 org $80 0080 ( turbos.d):00083 I$Attach rmb 1 attach I/O device 0081 ( turbos.d):00084 I$Detach rmb 1 detach I/O device 0082 ( turbos.d):00085 I$Dup rmb 1 duplicate path 0083 ( turbos.d):00086 I$Create rmb 1 create new file 0084 ( turbos.d):00087 I$Open rmb 1 open existing file 0085 ( turbos.d):00088 I$MakDir rmb 1 make directory file 0086 ( turbos.d):00089 I$ChgDir rmb 1 change default directory 0087 ( turbos.d):00090 I$Delete rmb 1 delete file 0088 ( turbos.d):00091 I$Seek rmb 1 change current position 0089 ( turbos.d):00092 I$Read rmb 1 read data 008A ( turbos.d):00093 I$Write rmb 1 write data 008B ( turbos.d):00094 I$ReadLn rmb 1 read line of ASCII data 008C ( turbos.d):00095 I$WritLn rmb 1 write line of ASCII data 008D ( turbos.d):00096 I$GetStt rmb 1 get path status 008E ( turbos.d):00097 I$SetStt rmb 1 set path status 008F ( turbos.d):00098 I$Close rmb 1 close path 0090 ( turbos.d):00099 I$DeletX rmb 1 delete from current exec dir ( turbos.d):00100 ( turbos.d):00101 ******************* ( turbos.d):00102 * File access modes ( turbos.d):00103 * 0001 ( turbos.d):00104 READ. equ %00000001 0002 ( turbos.d):00105 WRITE. equ %00000010 0003 ( turbos.d):00106 UPDAT. equ READ.+WRITE. 0004 ( turbos.d):00107 EXEC. equ %00000100 0008 ( turbos.d):00108 PREAD. equ %00001000 0010 ( turbos.d):00109 PWRIT. equ %00010000 0020 ( turbos.d):00110 PEXEC. equ %00100000 0040 ( turbos.d):00111 SHARE. equ %01000000 0080 ( turbos.d):00112 DIR. equ %10000000 0020 ( turbos.d):00113 ISIZ. equ %00100000 ( turbos.d):00114 ( turbos.d):00115 ************** ( turbos.d):00116 * Signal codes ( turbos.d):00117 * ( turbos.d):00118 org 0 0000 ( turbos.d):00119 S$Kill rmb 1 non-interceptable abort 0001 ( turbos.d):00120 S$Wake rmb 1 wake-up sleeping process 0002 ( turbos.d):00121 S$Abort rmb 1 keyboard abort 0003 ( turbos.d):00122 S$Intrpt rmb 1 keyboard interrupt ( turbos.d):00123 ( turbos.d):00124 pag ( turbos.d):00125 ********************************** ( turbos.d):00126 * Status codes for GetStat/SetStat ( turbos.d):00127 * ( turbos.d):00128 org 0 0000 ( turbos.d):00129 SS.Opt rmb 1 read/Write path descriptor options 0001 ( turbos.d):00130 SS.Ready rmb 1 check for device ready 0002 ( turbos.d):00131 SS.Size rmb 1 read/write file size 0003 ( turbos.d):00132 SS.Reset rmb 1 device restore 0004 ( turbos.d):00133 rmb 1 0005 ( turbos.d):00134 SS.Pos rmb 1 get file's current position 0006 ( turbos.d):00135 SS.EOF rmb 1 test for end of file 0007 ( turbos.d):00136 SS.Link rmb 1 link to status routines 0008 ( turbos.d):00137 SS.ULink rmb 1 unlink status routines 0009 ( turbos.d):00138 rmb 1 000A ( turbos.d):00139 SS.Frz rmb 1 freeze DD. information 000B ( turbos.d):00140 SS.SPT rmb 1 set DD.TKS to given value 000C ( turbos.d):00141 rmb 1 000D ( turbos.d):00142 SS.DCmd rmb 1 send direct command to disk 000E ( turbos.d):00143 SS.DevNm rmb 1 return device name (32-bytes at [X]) 000F ( turbos.d):00144 SS.FD rmb 1 return file descriptor (Y-bytes at [X]) 0010 ( turbos.d):00145 SS.Ticks rmb 1 set lockout honor duration 0011 ( turbos.d):00146 SS.Lock rmb 1 lock/release record 0012 ( turbos.d):00147 rmb 1 0013 ( turbos.d):00148 rmb 1 0014 ( turbos.d):00149 SS.BlkRd rmb 1 block read 0015 ( turbos.d):00150 SS.BlkWr rmb 1 block write 0016 ( turbos.d):00151 SS.Reten rmb 1 retension cycle 0017 ( turbos.d):00152 SS.WFM rmb 1 write file mark 0018 ( turbos.d):00153 SS.RFM rmb 1 read past file mark 0019 ( turbos.d):00154 SS.ELog rmb 1 read error log 001A ( turbos.d):00155 SS.SSig rmb 1 send signal on data ready 001B ( turbos.d):00156 SS.Relea rmb 1 release device 001C ( turbos.d):00157 rmb 1 001D ( turbos.d):00158 rmb 1 001E ( turbos.d):00159 SS.RsBit rmb 1 reserve bitmap sector (do not allocate in) LSB(X)=sct# 001F ( turbos.d):00160 rmb 1 reserved 0020 ( turbos.d):00161 rmb 1 0021 ( turbos.d):00162 rmb 3 0024 ( turbos.d):00163 rmb 1 0025 ( turbos.d):00164 rmb 1 0026 ( turbos.d):00165 rmb 1 0027 ( turbos.d):00166 rmb 1 0028 ( turbos.d):00167 SS.ComSt rmb 1 Getstat/SetStat for baud/parity 0029 ( turbos.d):00168 SS.Open rmb 1 SetStat to tell driver a path was opened 002A ( turbos.d):00169 SS.Close rmb 1 SetStat to tell driver a path was closed 002B ( turbos.d):00170 SS.HngUp rmb 1 SetStat to tell driver to hangup phone 002C ( turbos.d):00171 SS.FSig rmb 1 new signal for temp locked files 002D ( turbos.d):00172 rmb 19 ( turbos.d):00173 ( turbos.d):00174 org $A0 00A0 ( turbos.d):00175 rmb 1 00A1 ( turbos.d):00176 SS.Fill rmb 1 enable command-line history erase (scf) ( turbos.d):00177 ttl Direct Page Definitions ( turbos.d):00178 pag ( turbos.d):00179 ( turbos.d):00180 ********************************** ( turbos.d):00181 * Direct page variable definitions ( turbos.d):00182 * ( turbos.d):00183 org $00 ( turbos.d):00184 org $20 0020 ( turbos.d):00185 D.FMBM rmb 4 free memory bit map pointers 0024 ( turbos.d):00186 D.MLIM rmb 2 upper RAM memory limit 0026 ( turbos.d):00187 D.ModDir rmb 4 module directory pointers (start and end) 002A ( turbos.d):00188 D.Init rmb 2 configuration module base address 002C ( turbos.d):00189 D.SWI3 rmb 2 SWI3 vector 002E ( turbos.d):00190 D.SWI2 rmb 2 SWI2 vector 0030 ( turbos.d):00191 D.FIRQ rmb 2 FIRQ vector 0032 ( turbos.d):00192 D.IRQ rmb 2 IRQ vector 0034 ( turbos.d):00193 D.SWI rmb 2 SWI vector 0036 ( turbos.d):00194 D.NMI rmb 2 NMI vector 0038 ( turbos.d):00195 D.SvcIRQ rmb 2 interrupt service entry 003A ( turbos.d):00196 D.Poll rmb 2 interrupt polling routine 003C ( turbos.d):00197 D.UsrIRQ rmb 2 user interrupt routine 003E ( turbos.d):00198 D.SysIRQ rmb 2 system interrupt routine 0040 ( turbos.d):00199 D.UsrSvc rmb 2 user service request routine 0042 ( turbos.d):00200 D.SysSvc rmb 2 system service request routine 0044 ( turbos.d):00201 D.UsrDis rmb 2 user service request dispatch table 0046 ( turbos.d):00202 D.SysDis rmb 2 system service reuest dispatch table 0048 ( turbos.d):00203 D.Slice rmb 1 process time slice count 0049 ( turbos.d):00204 D.PrcDBT rmb 2 process descriptor block table 004B ( turbos.d):00205 D.Proc rmb 2 process descriptor address 004D ( turbos.d):00206 D.AProcQ rmb 2 active process queue 004F ( turbos.d):00207 D.WProcQ rmb 2 waiting process queue 0051 ( turbos.d):00208 D.SProcQ rmb 2 sleeping process queue 0053 ( turbos.d):00209 D.Time equ . time 0053 ( turbos.d):00210 D.Year rmb 1 current year 0054 ( turbos.d):00211 D.Month rmb 1 current month 0055 ( turbos.d):00212 D.Day rmb 1 current da 0056 ( turbos.d):00213 D.Hour rmb 1 current hour 0057 ( turbos.d):00214 D.Min rmb 1 current minute 0058 ( turbos.d):00215 D.Sec rmb 1 current second 0059 ( turbos.d):00216 D.Ticks rmb 4 number of ticks since boot 005D ( turbos.d):00217 D.Tick rmb 1 current tick 005E ( turbos.d):00218 D.TSec rmb 1 ticks per second 005F ( turbos.d):00219 D.TSlice rmb 1 ticks per time-slice 0060 ( turbos.d):00220 D.IOML rmb 2 I/O manager free memory low bound 0062 ( turbos.d):00221 D.IOMH rmb 2 I/O manager free memory hi bound 0064 ( turbos.d):00222 D.DevTbl rmb 2 device driver table address 0066 ( turbos.d):00223 D.PolTbl rmb 2 interrupt polling table address 0068 ( turbos.d):00224 D.PthDBT rmb 2 path descriptor block table addrress 006A ( turbos.d):00225 D.BTLO rmb 2 bootstrap low address 006C ( turbos.d):00226 D.BTHI rmb 2 bootstrap hi address 006E ( turbos.d):00227 D.Clock rmb 2 address of clock tick routine 0070 ( turbos.d):00228 D.Boot rmb 1 bootstrap attempted flag 0071 ( turbos.d):00229 D.URtoSs rmb 2 address of user to system routine (VIRQ) 0073 ( turbos.d):00230 D.VIRQTable rmb 2 pointer to virtual IRQ table 0075 ( turbos.d):00231 D.CRC rmb 1 CRC checking mode flag ( turbos.d):00232 ( turbos.d):00233 org $100 0100 ( turbos.d):00234 D.XSWI3 rmb 3 0103 ( turbos.d):00235 D.XSWI2 rmb 3 0106 ( turbos.d):00236 D.XSWI rmb 3 0109 ( turbos.d):00237 D.XNMI rmb 3 010C ( turbos.d):00238 D.XIRQ rmb 3 010F ( turbos.d):00239 D.XFIRQ rmb 3 ( turbos.d):00240 ( turbos.d):00241 * Table Sizes 0020 ( turbos.d):00242 BMAPSZ equ 65536/256/8 memory allocation bitmap table size 0002 ( turbos.d):00243 SVCTNM equ 2 number of service request tables 006E ( turbos.d):00244 SVCTSZ equ (256-BMAPSZ)/SVCTNM-2 service request table size ( turbos.d):00245 ( turbos.d):00246 ttl Structure Formats ( turbos.d):00247 pag ( turbos.d):00248 ************************************ ( turbos.d):00249 * Module directory entry definitions ( turbos.d):00250 * ( turbos.d):00251 org 0 0000 ( turbos.d):00252 MD$MPtr rmb 2 module pointer 0002 ( turbos.d):00253 MD$Link rmb 1 module link count 0003 ( turbos.d):00254 rmb 1 0004 ( turbos.d):00255 MD$ESize equ . module directory entry size ( turbos.d):00256 ( turbos.d):00257 ************************************ ( turbos.d):00258 * Module definitions ( turbos.d):00259 * ( turbos.d):00260 * Universal module offsets ( turbos.d):00261 * ( turbos.d):00262 org 0 0000 ( turbos.d):00263 M$ID rmb 2 ID code 0002 ( turbos.d):00264 M$Size rmb 2 module size 0004 ( turbos.d):00265 M$Name rmb 2 module name 0006 ( turbos.d):00266 M$Type rmb 1 type / language 0007 ( turbos.d):00267 M$Revs rmb 1 attributes / revision level 0008 ( turbos.d):00268 M$Parity rmb 1 header parity 0009 ( turbos.d):00269 M$IDSize equ . Mmdule ID size ( turbos.d):00270 ( turbos.d):00271 * ( turbos.d):00272 * Type-dependent module offsets ( turbos.d):00273 * ( turbos.d):00274 * System, file manager, device driver, program module ( turbos.d):00275 * 0009 ( turbos.d):00276 M$Exec rmb 2 execution entry offset ( turbos.d):00277 * ( turbos.d):00278 * Device driver, program module ( turbos.d):00279 * 000B ( turbos.d):00280 M$Mem rmb 2 stack requirement ( turbos.d):00281 * ( turbos.d):00282 * Device driver, device descriptor module ( turbos.d):00283 * 000D ( turbos.d):00284 M$Mode rmb 1 device driver mode capabilities ( turbos.d):00285 * ( turbos.d):00286 * Device descriptor module ( turbos.d):00287 * ( turbos.d):00288 org M$IDSize 0009 ( turbos.d):00289 M$FMgr rmb 2 file manager name offset 000B ( turbos.d):00290 M$PDev rmb 2 device driver name offset 000D ( turbos.d):00291 rmb 1 M$Mode (defined above) 000E ( turbos.d):00292 M$Port rmb 3 port address 0011 ( turbos.d):00293 M$Opt rmb 1 device default options 0012 ( turbos.d):00294 M$DTyp rmb 1 device type 0012 ( turbos.d):00295 IT.DTP equ M$DTyp descriptor type offset ( turbos.d):00296 ( turbos.d):00297 * ( turbos.d):00298 * Configuration module entry offsets ( turbos.d):00299 * ( turbos.d):00300 org M$IDSize 0009 ( turbos.d):00301 CM$MaxMem rmb 3 maximum free memory 000C ( turbos.d):00302 CM$PollCnt rmb 1 entries in interrupt polling table 000D ( turbos.d):00303 CM$DevCnt rmb 1 entries in device table 000E ( turbos.d):00304 CM$TickMod rmb 2 tick generator module name 0010 ( turbos.d):00305 CM$GoMod rmb 2 startup module name ( turbos.d):00306 ifne _FF_UNIFIED_IO 0012 ( turbos.d):00307 CM$StoreMod rmb 2 initial storage device name 0012 ( turbos.d):00308 CM$ConsoleMod rmb 2 initial console device name ( turbos.d):00309 endc ( turbos.d):00310 ifne _FF_BOOTING 0012 ( turbos.d):00311 CM$BootMod rmb 2 boot module name ( turbos.d):00312 endc 0014 ( turbos.d):00313 CM$OSLevel rmb 1 operating system level 0015 ( turbos.d):00314 CM$OSVer rmb 1 operating system version 0016 ( turbos.d):00315 CM$OSMajor rmb 1 operating system major 0017 ( turbos.d):00316 CM$OSMinor rmb 1 operating system minor 0018 ( turbos.d):00317 CM$Feature1 rmb 1 feature byte 1 0019 ( turbos.d):00318 CM$Feature2 rmb 1 feature byte 2 001A ( turbos.d):00319 rmb 4 reserved for future use ( turbos.d):00320 ( turbos.d):00321 * Feature1 byte definitions 0001 ( turbos.d):00322 CRCOn equ %00000001 CRC checking on 0000 ( turbos.d):00323 CRCOff equ %00000000 CRC checking off ( turbos.d):00324 ( turbos.d):00325 pag ( turbos.d):00326 ************************** ( turbos.d):00327 * Module field definitions ( turbos.d):00328 * ( turbos.d):00329 * ID field - first two bytes of a module ( turbos.d):00330 * 0087 ( turbos.d):00331 M$ID1 equ $87 module ID code byte one 00CD ( turbos.d):00332 M$ID2 equ $CD module ID code byte two 87CD ( turbos.d):00333 M$ID12 equ M$ID1*256+M$ID2 ( turbos.d):00334 ( turbos.d):00335 * ( turbos.d):00336 * Module type/language field masks ( turbos.d):00337 * 00F0 ( turbos.d):00338 TypeMask equ %11110000 type field 000F ( turbos.d):00339 LangMask equ %00001111 language field ( turbos.d):00340 ( turbos.d):00341 * ( turbos.d):00342 * Module type values ( turbos.d):00343 * 00F0 ( turbos.d):00344 Devic equ $F0 device descriptor module 00E0 ( turbos.d):00345 Drivr equ $E0 physical device driver 00D0 ( turbos.d):00346 FlMgr equ $D0 file manager 00C0 ( turbos.d):00347 Systm equ $C0 system module 0040 ( turbos.d):00348 Data equ $40 data module 0020 ( turbos.d):00349 Sbrtn equ $20 subroutine module 0010 ( turbos.d):00350 Prgrm equ $10 program module ( turbos.d):00351 ( turbos.d):00352 * ( turbos.d):00353 * Module language values ( turbos.d):00354 * 0001 ( turbos.d):00355 Objct equ 1 object code module ( turbos.d):00356 ( turbos.d):00357 * ( turbos.d):00358 * Module attributes / revision byte ( turbos.d):00359 * ( turbos.d):00360 * Field masks ( turbos.d):00361 * 00F0 ( turbos.d):00362 AttrMask equ %11110000 attributes field 000F ( turbos.d):00363 RevsMask equ %00001111 revision level field ( turbos.d):00364 ( turbos.d):00365 * ( turbos.d):00366 * Attribute flags ( turbos.d):00367 * 0080 ( turbos.d):00368 ReEnt equ %10000000 re-entrant module ( turbos.d):00369 ( turbos.d):00370 ******************** ( turbos.d):00371 * Device type values ( turbos.d):00372 * ( turbos.d):00373 * These values define various classes of devices, which are ( turbos.d):00374 * managed by a file manager module. The device type is embedded ( turbos.d):00375 * in a device descriptor. ( turbos.d):00376 * 0000 ( turbos.d):00377 DT.SCF equ 0 sequential character file manager 0001 ( turbos.d):00378 DT.RBF equ 1 random block file manager 0002 ( turbos.d):00379 DT.Pipe equ 2 pipe file manager ( turbos.d):00380 ( turbos.d):00381 ********************* ( turbos.d):00382 * CRC result constant ( turbos.d):00383 * 0080 ( turbos.d):00384 CRCCon1 equ $80 0FE3 ( turbos.d):00385 CRCCon23 equ $0FE3 ( turbos.d):00386 ( turbos.d):00387 ttl Process Information ( turbos.d):00388 pag ( turbos.d):00389 ******************************** ( turbos.d):00390 * Process descriptor definitions ( turbos.d):00391 * 000C ( turbos.d):00392 DefIOSiz equ 12 0010 ( turbos.d):00393 NumPaths equ 16 number of local paths ( turbos.d):00394 ( turbos.d):00395 org 0 0000 ( turbos.d):00396 P$ID rmb 1 process ID 0001 ( turbos.d):00397 P$PID rmb 1 parent's ID 0002 ( turbos.d):00398 P$SID rmb 1 sibling's ID 0003 ( turbos.d):00399 P$CID rmb 1 child's ID 0004 ( turbos.d):00400 P$SP rmb 2 stack pointer 0006 ( turbos.d):00401 P$CHAP rmb 1 process chapter number 0007 ( turbos.d):00402 P$ADDR rmb 1 user address beginning page number 0008 ( turbos.d):00403 P$PagCnt rmb 1 memory page count 0009 ( turbos.d):00404 P$User rmb 2 user index 000B ( turbos.d):00405 P$Prior rmb 1 priority 000C ( turbos.d):00406 P$Age rmb 1 age 000D ( turbos.d):00407 P$State rmb 1 status 000E ( turbos.d):00408 P$Queue rmb 2 queue link (process pointer) 0010 ( turbos.d):00409 P$IOQP rmb 1 previous I/O queue link (process ID) 0011 ( turbos.d):00410 P$IOQN rmb 1 next I/O queue link (process ID) 0012 ( turbos.d):00411 P$PModul rmb 2 primary module 0014 ( turbos.d):00412 P$SWI rmb 2 SWI entry point 0016 ( turbos.d):00413 P$SWI2 rmb 2 SWI2 entry point 0018 ( turbos.d):00414 P$SWI3 rmb 2 SWI3 entry point 001A ( turbos.d):00415 P$DIO rmb DefIOSiz default I/O pointers 0026 ( turbos.d):00416 P$PATH rmb NumPaths I/O path table 0036 ( turbos.d):00417 P$Signal rmb 1 signal code 0037 ( turbos.d):00418 P$SigVec rmb 2 signal intercept vector 0039 ( turbos.d):00419 P$SigDat rmb 2 signal intercept data address 003B ( turbos.d):00420 P$NIO rmb 4 003F ( turbos.d):00421 rmb $40-. unused 0040 ( turbos.d):00422 P$Size equ . size of process descriptor ( turbos.d):00423 ( turbos.d):00424 * ( turbos.d):00425 * Process state flags ( turbos.d):00426 * 0080 ( turbos.d):00427 SysState equ %10000000 0040 ( turbos.d):00428 TimSleep equ %01000000 0020 ( turbos.d):00429 TimOut equ %00100000 0010 ( turbos.d):00430 ImgChg equ %00010000 0002 ( turbos.d):00431 Condem equ %00000010 0001 ( turbos.d):00432 Dead equ %00000001 ( turbos.d):00433 ( turbos.d):00434 ttl I/O Definitions ( turbos.d):00435 pag ( turbos.d):00436 ************************* ( turbos.d):00437 * Path descriptor offsets ( turbos.d):00438 * ( turbos.d):00439 org 0 0000 ( turbos.d):00440 PD.PD rmb 1 path number 0001 ( turbos.d):00441 PD.MOD rmb 1 mode (read/write/update) 0002 ( turbos.d):00442 PD.CNT rmb 1 number of open images 0003 ( turbos.d):00443 PD.DEV rmb 2 device table entry address 0005 ( turbos.d):00444 PD.CPR rmb 1 current process 0006 ( turbos.d):00445 PD.RGS rmb 2 caller's register stack 0008 ( turbos.d):00446 PD.BUF rmb 2 buffer address 000A ( turbos.d):00447 PD.FST rmb 32-. file manager's storage 0020 ( turbos.d):00448 PD.OPT equ . path descriptor options 0020 ( turbos.d):00449 PD.DTP rmb 1 device type 0021 ( turbos.d):00450 rmb 64-. path options end 0040 ( turbos.d):00451 PDSIZE equ . ( turbos.d):00452 ( turbos.d):00453 * ( turbos.d):00454 * Pathlist special symbols ( turbos.d):00455 * 002F ( turbos.d):00456 PDELIM equ '/ pathlist name separator 002E ( turbos.d):00457 PDIR equ '. directory 0040 ( turbos.d):00458 PENTIR equ '@ entire device ( turbos.d):00459 ( turbos.d):00460 pag ( turbos.d):00461 **************************** ( turbos.d):00462 * File manager entry offsets ( turbos.d):00463 * ( turbos.d):00464 org 0 0000 ( turbos.d):00465 FMCREA rmb 3 create (open new) file 0003 ( turbos.d):00466 FMOPEN rmb 3 open file 0006 ( turbos.d):00467 FMMDIR rmb 3 make directory 0009 ( turbos.d):00468 FMCDIR rmb 3 change directory 000C ( turbos.d):00469 FMDLET rmb 3 delete file 000F ( turbos.d):00470 FMSEEK rmb 3 position file 0012 ( turbos.d):00471 FMREAD rmb 3 read from file 0015 ( turbos.d):00472 FMWRIT rmb 3 write to file 0018 ( turbos.d):00473 FMRDLN rmb 3 read line 001B ( turbos.d):00474 FMWRLN rmb 3 write line 001E ( turbos.d):00475 FMGSTA rmb 3 get file status 0021 ( turbos.d):00476 FMSSTA rmb 3 set file status 0024 ( turbos.d):00477 FMCLOS rmb 3 close file ( turbos.d):00478 ( turbos.d):00479 ***************************** ( turbos.d):00480 * Device driver entry offsets ( turbos.d):00481 * ( turbos.d):00482 org 0 0000 ( turbos.d):00483 D$INIT rmb 3 device initialization 0003 ( turbos.d):00484 D$READ rmb 3 read from device 0006 ( turbos.d):00485 D$WRIT rmb 3 write to device 0009 ( turbos.d):00486 D$GSTA rmb 3 get device status 000C ( turbos.d):00487 D$PSTA rmb 3 put device status 000F ( turbos.d):00488 D$TERM rmb 3 device termination ( turbos.d):00489 ( turbos.d):00490 ********************* ( turbos.d):00491 * Device table format ( turbos.d):00492 * ( turbos.d):00493 org 0 0000 ( turbos.d):00494 V$DRIV rmb 2 device driver module 0002 ( turbos.d):00495 V$STAT rmb 2 device driver static storage 0004 ( turbos.d):00496 V$DESC rmb 2 device descriptor module 0006 ( turbos.d):00497 V$FMGR rmb 2 file manager module 0008 ( turbos.d):00498 V$USRS rmb 1 use count 0009 ( turbos.d):00499 DEVSIZ equ . ( turbos.d):00500 ( turbos.d):00501 ******************************* ( turbos.d):00502 * Device static storage offsets ( turbos.d):00503 * ( turbos.d):00504 org 0 0000 ( turbos.d):00505 V.PAGE rmb 1 port extended address 0001 ( turbos.d):00506 V.PORT rmb 2 device 'base' port address 0003 ( turbos.d):00507 V.LPRC rmb 1 last active process ID 0004 ( turbos.d):00508 V.BUSY rmb 1 active process ID (0=not busy) 0005 ( turbos.d):00509 V.WAKE rmb 1 active process descriptor if driver MUST wake-up 0006 ( turbos.d):00510 V.USER equ . driver allocation origin ( turbos.d):00511 ( turbos.d):00512 ******************************** ( turbos.d):00513 * Interrupt polling table format ( turbos.d):00514 * ( turbos.d):00515 org 0 0000 ( turbos.d):00516 Q$Poll rmb 2 absolute polling address 0002 ( turbos.d):00517 Q$Flip rmb 1 flip (EOR) byte; normally zero 0003 ( turbos.d):00518 Q$Mask rmb 1 polling mask (after flip) 0004 ( turbos.d):00519 Q$Serv rmb 2 absolute service routine Address 0006 ( turbos.d):00520 Q$Stat rmb 2 static storage address 0008 ( turbos.d):00521 Q$Prty rmb 1 priority (low numbers=top priority) 0009 ( turbos.d):00522 POLSIZ equ . ( turbos.d):00523 ( turbos.d):00524 ******************** ( turbos.d):00525 * VIRQ packet format ( turbos.d):00526 * ( turbos.d):00527 org 0 0000 ( turbos.d):00528 Vi.Cnt rmb 2 count down counter 0002 ( turbos.d):00529 Vi.Rst rmb 2 reset value for counter 0004 ( turbos.d):00530 Vi.Stat rmb 1 status byte 0005 ( turbos.d):00531 Vi.PkSz equ . ( turbos.d):00532 0001 ( turbos.d):00533 Vi.IFlag equ %00000001 status byte virq flag ( turbos.d):00534 ( turbos.d):00535 pag ( turbos.d):00536 ************************************* ( turbos.d):00537 * Machine characteristics definitions ( turbos.d):00538 * 0000 ( turbos.d):00539 R$CC equ 0 condition codes register 0001 ( turbos.d):00540 R$A equ 1 A accumulator 0002 ( turbos.d):00541 R$B equ 2 B accumulator 0001 ( turbos.d):00542 R$D equ R$A combined A:B accumulator 0003 ( turbos.d):00543 R$DP equ 3 direct page register 0004 ( turbos.d):00544 R$X equ 4 X index register 0006 ( turbos.d):00545 R$Y equ 6 Y index register 0008 ( turbos.d):00546 R$U equ 8 user stack register 000A ( turbos.d):00547 R$PC equ 10 program counter register 000C ( turbos.d):00548 R$Size equ 12 total register package size ( turbos.d):00549 0080 ( turbos.d):00550 Entire equ %10000000 full register stack flag 0040 ( turbos.d):00551 FIRQMask equ %01000000 fast interrupt mask bit 0020 ( turbos.d):00552 HalfCrry equ %00100000 half carry flag 0010 ( turbos.d):00553 IRQMask equ %00010000 interrupt mask bit 0008 ( turbos.d):00554 Negative equ %00001000 negative flag 0004 ( turbos.d):00555 Zero equ %00000100 zero flag 0002 ( turbos.d):00556 TwosOvfl equ %00000010 two's complement overflow flag 0001 ( turbos.d):00557 Carry equ %00000001 carry bit 0050 ( turbos.d):00558 IntMasks equ IRQMask+FIRQMask 0080 ( turbos.d):00559 Sign equ %10000000 sign bit ( turbos.d):00560 ( turbos.d):00561 ttl Error code definitions ( turbos.d):00562 pag ( turbos.d):00563 ************************ ( turbos.d):00564 * Error code definitions ( turbos.d):00565 * ( turbos.d):00566 org 200 00C8 ( turbos.d):00567 E$PthFul rmb 1 path table full 00C9 ( turbos.d):00568 E$BPNum rmb 1 bad path number 00CA ( turbos.d):00569 E$Poll rmb 1 polling table Full 00CB ( turbos.d):00570 E$BMode rmb 1 bad Mode 00CC ( turbos.d):00571 E$DevOvf rmb 1 device table overflow 00CD ( turbos.d):00572 E$BMID rmb 1 bad module ID 00CE ( turbos.d):00573 E$DirFul rmb 1 module directory full 00CF ( turbos.d):00574 E$MemFul rmb 1 process memory full 00D0 ( turbos.d):00575 E$UnkSvc rmb 1 unknown service code 00D1 ( turbos.d):00576 E$ModBsy rmb 1 module busy 00D2 ( turbos.d):00577 E$BPAddr rmb 1 bad page address 00D3 ( turbos.d):00578 E$EOF rmb 1 end of file 00D4 ( turbos.d):00579 rmb 1 00D5 ( turbos.d):00580 E$NES rmb 1 non-existent segment 00D6 ( turbos.d):00581 E$FNA rmb 1 file not accesible 00D7 ( turbos.d):00582 E$BPNam rmb 1 bad path name 00D8 ( turbos.d):00583 E$PNNF rmb 1 path name Not Found 00D9 ( turbos.d):00584 E$SLF rmb 1 segment list full 00DA ( turbos.d):00585 E$CEF rmb 1 creating existing file 00DB ( turbos.d):00586 E$IBA rmb 1 illegal block address 00DC ( turbos.d):00587 E$HangUp rmb 1 carrier detect lost 00DD ( turbos.d):00588 E$MNF rmb 1 module not found 00DE ( turbos.d):00589 rmb 1 00DF ( turbos.d):00590 E$DelSP rmb 1 deleting stack pointer memory 00E0 ( turbos.d):00591 E$IPrcID rmb 1 illegal process ID 00E0 ( turbos.d):00592 E$BPrcID equ E$IPrcID bad process ID 00E1 ( turbos.d):00593 rmb 1 00E2 ( turbos.d):00594 E$NoChld rmb 1 no children 00E3 ( turbos.d):00595 E$ISWI rmb 1 illegal SWI code 00E4 ( turbos.d):00596 E$PrcAbt rmb 1 process aborted 00E5 ( turbos.d):00597 E$PrcFul rmb 1 process table full 00E6 ( turbos.d):00598 E$IForkP rmb 1 illegal fork parameter 00E7 ( turbos.d):00599 E$KwnMod rmb 1 known module 00E8 ( turbos.d):00600 E$BMCRC rmb 1 bad module CRC 00E9 ( turbos.d):00601 E$USigP rmb 1 unprocessed signal pending 00EA ( turbos.d):00602 E$NEMod rmb 1 non-existent module 00EB ( turbos.d):00603 E$BNam rmb 1 bad name 00EC ( turbos.d):00604 E$BMHP rmb 1 bad module header parity 00ED ( turbos.d):00605 E$NoRAM rmb 1 no system RAM available 00EE ( turbos.d):00606 E$DNE rmb 1 directory not empty 00EF ( turbos.d):00607 E$NoTask rmb 1 no available task number ( turbos.d):00608 rmb $F0-. reserved 00F0 ( turbos.d):00609 E$Unit rmb 1 illegal media unit 00F1 ( turbos.d):00610 E$Sect rmb 1 bad sector number 00F2 ( turbos.d):00611 E$WP rmb 1 write protect 00F3 ( turbos.d):00612 E$CRC rmb 1 bad checksum 00F4 ( turbos.d):00613 E$Read rmb 1 read error 00F5 ( turbos.d):00614 E$Write rmb 1 write error 00F6 ( turbos.d):00615 E$NotRdy rmb 1 device not ready 00F7 ( turbos.d):00616 E$Seek rmb 1 seek error 00F8 ( turbos.d):00617 E$Full rmb 1 media full 00F9 ( turbos.d):00618 E$BTyp rmb 1 bad type (incompatible) media 00FA ( turbos.d):00619 E$DevBsy rmb 1 device busy 00FB ( turbos.d):00620 E$DIDC rmb 1 media ID change 00FC ( turbos.d):00621 E$Lock rmb 1 record is busy (locked out) 00FD ( turbos.d):00622 E$Share rmb 1 non-sharable file busy 00FE ( turbos.d):00623 E$DeadLk rmb 1 I/O deadlock error ( turbos.d):00624 ( turbos.d):00625 * Character definitions 0020 ( turbos.d):00626 C$Space set $20 002E ( turbos.d):00627 C$Period set '. 002C ( turbos.d):00628 C$Comma set ', 000D ( turbos.d):00629 C$CR set $0D 000A ( turbos.d):00630 C$LF set $0A ( turbos.d):00631 ( turbos.d):00632 endc ( defs.d):00025 ( defs.d):00026 * F256 Jr. specific definitions ( defs.d):00027 use f256.d ( f256.d):00001 ifne F256.D-1 0001 ( f256.d):00002 F256.D set 1 ( f256.d):00003 ( f256.d):00004 ******************************************************************** ( f256.d):00005 * F256Defs - NitrOS-9 System Definitions for the Foenix F256 ( f256.d):00006 * ( f256.d):00007 * This is a high level view of the F256 memory map as setup by ( f256.d):00008 * NitrOS-9. ( f256.d):00009 * ( f256.d):00010 * $0000----> ================================== ( f256.d):00011 * | | ( f256.d):00012 * | NitrOS-9 Globals/Stack | ( f256.d):00013 * | | ( f256.d):00014 * $0500---->|==================================| ( f256.d):00015 * | | ( f256.d):00016 * . . . . . . . . . . . . . . . . . ( f256.d):00017 * | | ( f256.d):00018 * | RAM available for allocation | ( f256.d):00019 * | by NitrOS-9 and Apps | ( f256.d):00020 * | | ( f256.d):00021 * . . . . . . . . . . . . . . . . . ( f256.d):00022 * | | ( f256.d):00023 * $FD00---->|==================================| ( f256.d):00024 * | Constant RAM (for Level 2) | ( f256.d):00025 * $FE00---->|==================================| ( f256.d):00026 * | I/O | ( f256.d):00027 * | & Vectors | ( f256.d):00028 * ================================== ( f256.d):00029 * ( f256.d):00030 * F256 hardware is documented here: ( f256.d):00031 * https://github.com/pweingar/C256jrManual/blob/main/tex/f256jr_ref.pdf ( f256.d):00032 * ( f256.d):00033 * $Id$ ( f256.d):00034 * ( f256.d):00035 * Edt/Rev YYYY/MM/DD Modified by ( f256.d):00036 * Comment ( f256.d):00037 * ------------------------------------------------------------------ ( f256.d):00038 * 2023/02/07 Boisy G. Pitre ( f256.d):00039 * Started. ( f256.d):00040 * ( f256.d):00041 * 2023/08/16 Boisy G. Pitre ( f256.d):00042 * Modified to address new memory map that Stefany created. ( f256.d):00043 ( f256.d):00044 ******************************************************************** ( f256.d):00045 * Ticks per second ( f256.d):00046 * 003C ( f256.d):00047 TkPerSec set 60 ( f256.d):00048 ( f256.d):00049 ifeq Level-1 ( f256.d):00050 ( f256.d):00051 ******************************************************************** ( f256.d):00052 * ( f256.d):00053 * NitrOS-9 Level 1 Section ( f256.d):00054 * ( f256.d):00055 ******************************************************************** ( f256.d):00056 ( f256.d):00057 ******************************************************************** ( f256.d):00058 * Boot definitions for NitrOS-9 Level 1 ( f256.d):00059 * ( f256.d):00060 * These definitions are not strictly for 'Boot', but are for booting the ( f256.d):00061 * system. ( f256.d):00062 * 00FF ( f256.d):00063 HW.Page set $FF device descriptor hardware page ( f256.d):00064 ( f256.d):00065 else ( f256.d):00066 0007 ( f256.d):00067 HW.Page set $07 device descriptor hardware page EE00 ( f256.d):00068 Bt.Start set $EE00 start address of where KRN is in memory ( f256.d):00069 ( f256.d):00070 ************************************************* ( f256.d):00071 * ( f256.d):00072 * NitrOS-9 Level 2 Section ( f256.d):00073 * ( f256.d):00074 ************************************************* ( f256.d):00075 ( f256.d):00076 **************************************** ( f256.d):00077 * Dynamic Address Translator Definitions ( f256.d):00078 * 0008 ( f256.d):00079 DAT.BlCt EQU 8 DAT blocks/address space 2000 ( f256.d):00080 DAT.BlSz EQU (256/DAT.BlCt)*256 DAT block size 0010 ( f256.d):00081 DAT.ImSz EQU DAT.BlCt*2 DAT image size FFE0 ( f256.d):00082 DAT.Addr EQU -(DAT.BlSz/256) DAT MSB address bits FFA0 ( f256.d):00083 DAT.Task EQU $FFA0 task register address 0020 ( f256.d):00084 DAT.TkCt EQU 32 number of DAT tasks FFA8 ( f256.d):00085 DAT.Regs EQU $FFA8 DAT block registers base address 333E ( f256.d):00086 DAT.Free EQU $333E free block number 003F ( f256.d):00087 DAT.BlMx EQU $3F maximum block number 0040 ( f256.d):00088 DAT.BMSz EQU $40 memory block map size 0000 ( f256.d):00089 DAT.WrPr EQU 0 no write protect 0000 ( f256.d):00090 DAT.WrEn EQU 0 no write enable 0000 ( f256.d):00091 SysTask EQU 0 CoCo system task number 003F ( f256.d):00092 IOBlock EQU $3F 003F ( f256.d):00093 ROMBlock EQU $3F 007F ( f256.d):00094 IOAddr EQU $7F 0001 ( f256.d):00095 ROMCount EQU 1 number of blocks of ROM (high RAM block) 0001 ( f256.d):00096 RAMCount EQU 1 initial blocks of RAM 0005 ( f256.d):00097 MoveBlks EQU DAT.BlCt-ROMCount-2 block numbers used for copies 0001 ( f256.d):00098 BlockTyp EQU 1 check only first bytes of RAM block 0002 ( f256.d):00099 ByteType EQU 2 check entire block of RAM 0001 ( f256.d):00100 Limited EQU 1 check only upper memory for ROM modules 0002 ( f256.d):00101 UnLimitd EQU 2 check all NotRAM for modules ( f256.d):00102 * NOTE: this check assumes any NotRAM with a module will ( f256.d):00103 * always start with $87CD in first two bytes of block 0001 ( f256.d):00104 RAMCheck EQU BlockTyp check only beg bytes of block 0001 ( f256.d):00105 ROMCheck EQU Limited check only upper few blocks for ROM 003F ( f256.d):00106 LastRAM EQU IOBlock maximum RAM block number ( f256.d):00107 0007 ( f256.d):00108 HW.Page SET $7 device descriptor hardware page ( f256.d):00109 ( f256.d):00110 * KrnBlk defines the block number of the 8K RAM block that is mapped to ( f256.d):00111 * the top of CPU address space ($E000-$FFFF) for the system process, and ( f256.d):00112 * which holds the Kernel. The top 3 pages of this CPU address space ($FD00- ( f256.d):00113 * $FFFF) have two special properties. First, $FE00-$FFFF contains the I/O space. ( f256.d):00114 * Second, $FD00-$FDFFF isn't affected by the DAT mappings but, instead, ( f256.d):00115 * remains constant regardless of what block is mapped in at slot 7. ( f256.d):00116 * When a user process is mapped in, and requests enough memory, it will end up ( f256.d):00117 * with its own block assigned for CPU address space $E000- ( f256.d):00118 * $FFFF but $FD00-$FFFF is unusable by the user process. 0007 ( f256.d):00119 KrnBlk SET $7 ( f256.d):00120 ( f256.d):00121 endc ( f256.d):00122 ( f256.d):00123 ******************************************************************** ( f256.d):00124 * System control definitions ( f256.d):00125 * FE00 ( f256.d):00126 SYS0 equ $FE00 FE01 ( f256.d):00127 SYS1 equ $FE01 FE02 ( f256.d):00128 RST0 equ $FE02 FE03 ( f256.d):00129 RST1 equ $FE03 ( f256.d):00130 0080 ( f256.d):00131 SYS_RESET equ %10000000 0020 ( f256.d):00132 SYS_CAP_EN equ %00100000 0010 ( f256.d):00133 SYS_BUZZ equ %00010000 0008 ( f256.d):00134 SYS_L1 equ %00001000 0004 ( f256.d):00135 SYS_L0 equ %00000100 0002 ( f256.d):00136 SYS_SD_L equ %00000010 0001 ( f256.d):00137 SYS_PWR_L equ %00000001 ( f256.d):00138 0080 ( f256.d):00139 SYS_SD_WP equ %10000000 0040 ( f256.d):00140 SYS_SD_CD equ %01000000 00C0 ( f256.d):00141 SYS_L1_RATE equ %11000000 0030 ( f256.d):00142 SYS_L0_RATE equ %00110000 0008 ( f256.d):00143 SYS_SID_ST equ %00001000 0004 ( f256.d):00144 SYS_PSG_ST equ %00000100 0002 ( f256.d):00145 SYS_L1_MN equ %00000010 0001 ( f256.d):00146 SYS_L0_MN equ %00000001 ( f256.d):00147 ( f256.d):00148 ******************************************************************** ( f256.d):00149 * F256 MMU definitions ( f256.d):00150 * FFA0 ( f256.d):00151 MMU_MEM_CTRL equ $FFA0 FFA1 ( f256.d):00152 MMU_IO_CTRL equ $FFA1 FFA8 ( f256.d):00153 MMU_SLOT_0 equ $FFA8 $0000-$1FFF FFA9 ( f256.d):00154 MMU_SLOT_1 equ $FFA9 $2000-$3FFF FFAA ( f256.d):00155 MMU_SLOT_2 equ $FFAA $4000-$5FFF FFAB ( f256.d):00156 MMU_SLOT_3 equ $FFAB $6000-$7FFF FFAC ( f256.d):00157 MMU_SLOT_4 equ $FFAC $8000-$9FFF FFAD ( f256.d):00158 MMU_SLOT_5 equ $FFAD $A000-$BFFF FFAE ( f256.d):00159 MMU_SLOT_6 equ $FFAE $C000-$DFFF FFAF ( f256.d):00160 MMU_SLOT_7 equ $FFAF $E000-$FFFF ( f256.d):00161 ( f256.d):00162 * MMU_MEM_CTRL bits 0030 ( f256.d):00163 EDIT_LUT equ %00110000 0000 ( f256.d):00164 EDIT_LUT_0 equ %00000000 0010 ( f256.d):00165 EDIT_LUT_1 equ %00010000 0020 ( f256.d):00166 EDIT_LUT_2 equ %00100000 0030 ( f256.d):00167 EDIT_LUT_3 equ %00110000 0000 ( f256.d):00168 ACT_LUT equ %00000000 0000 ( f256.d):00169 ACT_LUT_0 equ %00000000 0001 ( f256.d):00170 ACT_LUT_1 equ %00000001 0002 ( f256.d):00171 ACT_LUT_2 equ %00000010 0003 ( f256.d):00172 ACT_LUT_3 equ %00000011 ( f256.d):00173 0008 ( f256.d):00174 LUT_BANK_0 equ $0008 0009 ( f256.d):00175 LUT_BANK_1 equ $0009 000A ( f256.d):00176 LUT_BANK_2 equ $000A 000B ( f256.d):00177 LUT_BANK_3 equ $000B 000C ( f256.d):00178 LUT_BANK_4 equ $000C 000D ( f256.d):00179 LUT_BANK_5 equ $000D 000E ( f256.d):00180 LUT_BANK_6 equ $000E 000F ( f256.d):00181 LUT_BANK_7 equ $000F ( f256.d):00182 ( f256.d):00183 * MMU_IO_CTRL bits ( f256.d):00184 * $FFA1 has 2 bits: ( f256.d):00185 * FFA1[0] = ( f256.d):00186 * 1 = Enable internal RAM for segment $FD00-$FDFF. ( f256.d):00187 * 0 = Disable; RAM/FLASH is accessible. ( f256.d):00188 * ( f256.d):00189 * FFA1[1] = ( f256.d):00190 * 1 = Enable internal RAM for segment $FFF0-$FFFF ( f256.d):00191 * 0 = Disable; RAM/FLASH is accessible. ( f256.d):00192 * When enabled, the areas supersede RAM/flash, but will be disabled by RESET. When the system resets, ( f256.d):00193 * those regions revert to RAM/flash. Also at RESET, the contents of RAM retain the old values until the ( f256.d):00194 * system powers off. ( f256.d):00195 ( f256.d):00196 ******************************************************************** ( f256.d):00197 * F256 interrupt definitions ( f256.d):00198 * ( f256.d):00199 * Interrupt addresses FE20 ( f256.d):00200 INT_PENDING_0 equ $FE20 FE24 ( f256.d):00201 INT_POLARITY_0 equ $FE24 FE28 ( f256.d):00202 INT_EDGE_0 equ $FE28 FE2C ( f256.d):00203 INT_MASK_0 equ $FE2C ( f256.d):00204 FE21 ( f256.d):00205 INT_PENDING_1 equ $FE21 FE25 ( f256.d):00206 INT_POLARITY_1 equ $FE25 FE29 ( f256.d):00207 INT_EDGE_1 equ $FE29 FE2D ( f256.d):00208 INT_MASK_1 equ $FE2D ( f256.d):00209 FE22 ( f256.d):00210 INT_PENDING_2 equ $FE22 not used FE26 ( f256.d):00211 INT_POLARITY_2 equ $FE26 not used FE2A ( f256.d):00212 INT_EDGE_2 equ $FE2A not used FE2E ( f256.d):00213 INT_MASK_2 equ $FE2E not used ( f256.d):00214 FE23 ( f256.d):00215 INT_PENDING_3 equ $FE23 not used FE27 ( f256.d):00216 INT_POLARITY_3 equ $FE27 not used FE2B ( f256.d):00217 INT_EDGE_3 equ $FE2B not used FE2F ( f256.d):00218 INT_MASK_3 equ $FE2F not used ( f256.d):00219 ( f256.d):00220 * Interrupt Group 0 Flags 0001 ( f256.d):00221 INT_VKY_SOF equ %00000001 TinyVicky start of frame interrupt 0002 ( f256.d):00222 INT_VKY_SOL equ %00000010 TinyVicky start of line interrupt 0004 ( f256.d):00223 INT_PS2_KBD equ %00000100 PS/2 keyboard event 0008 ( f256.d):00224 INT_PS2_MOUSE equ %00001000 PS/2 mouse event 0010 ( f256.d):00225 INT_TIMER_0 equ %00010000 TIMER0 has reached its target value 0010 ( f256.d):00226 INT_TIMER_1 equ %00010000 TIMER1 has reached its target value 0080 ( f256.d):00227 INT_CARTRIDGE equ %10000000 Interrupt asserted by the cartridge ( f256.d):00228 ( f256.d):00229 * Interrupt Group 1 Flags 0001 ( f256.d):00230 INT_UART equ %00000001 UART is ready to receive or send data 0010 ( f256.d):00231 INT_RTC equ %00010000 event from the real time clock chip 0020 ( f256.d):00232 INT_VIA0 equ %00100000 event from the 65C22 VIA chip 0040 ( f256.d):00233 INT_VIA1 equ %01000000 F256K Only: local keyboard 0040 ( f256.d):00234 INT_SDC_INS equ %01000000 yser has inserted an SD card ( f256.d):00235 ( f256.d):00236 * Interrupt Group 2 Flags 0001 ( f256.d):00237 IEC_DATA_i equ %00000001 IEC data in 0002 ( f256.d):00238 IEC_CLK_i equ %00000010 IEC clock in 0004 ( f256.d):00239 IEC_ATN_i equ %00000100 IEC ATN in 0008 ( f256.d):00240 IEC_SREQ_i equ %00001000 IEC SREQ in ( f256.d):00241 ( f256.d):00242 ******************************************************************** ( f256.d):00243 * F256 keyboard definitions ( f256.d):00244 * FE50 ( f256.d):00245 PS2_CTRL equ $FE50 FE51 ( f256.d):00246 PS2_OUT equ $FE51 FE52 ( f256.d):00247 KBD_IN equ $FE52 FE53 ( f256.d):00248 MS_IN equ $FE53 FE54 ( f256.d):00249 PS2_STAT equ $FE54 ( f256.d):00250 0020 ( f256.d):00251 MCLR equ %00100000 0010 ( f256.d):00252 KCLR equ %00010000 0008 ( f256.d):00253 M_WR equ %00001000 0002 ( f256.d):00254 K_WR equ %00000010 ( f256.d):00255 0080 ( f256.d):00256 K_AK equ %10000000 0040 ( f256.d):00257 K_NK equ %01000000 0020 ( f256.d):00258 M_AK equ %00100000 0010 ( f256.d):00259 M_NK equ %00010000 0002 ( f256.d):00260 MEMP equ %00000010 0001 ( f256.d):00261 KEMP equ %00000001 ( f256.d):00262 ( f256.d):00263 ******************************************************************** ( f256.d):00264 * F256 timer definitions ( f256.d):00265 * ( f256.d):00266 * Timer addresses FE30 ( f256.d):00267 T0_CTR equ $FE30 timer 0 counter (write) FE30 ( f256.d):00268 T0_STAT equ $FE30 timer 0 status (read) FE31 ( f256.d):00269 T0_VAL equ $FE31 timer 0 value (read/write) FE34 ( f256.d):00270 T0_CMP_CTR equ $FE34 timer 0 compare counter (read/write) FE35 ( f256.d):00271 T0_CMP equ $FE35 timer 0 compare value (read/write) FE38 ( f256.d):00272 T1_CTR equ $FE38 timer 1 counter (write) FE38 ( f256.d):00273 T1_STAT equ $FE38 timer 1 status (read) FE39 ( f256.d):00274 T1_VAL equ $FE39 timer 1 value (read/write) FE3C ( f256.d):00275 T1_CMP_CTR equ $FE3C timer 1 compare counter (read/write) FE3D ( f256.d):00276 T1_CMP equ $FE3D timer 1 compare value (read/write) ( f256.d):00277 ( f256.d):00278 ******************************************************************** ( f256.d):00279 * F256 VIA definitions ( f256.d):00280 * ( f256.d):00281 * VIA addresses FFB0 ( f256.d):00282 IORB equ $FFB0 port b data FFB1 ( f256.d):00283 IORA equ $FFB1 port a data FFB2 ( f256.d):00284 DDRB equ $FFB2 port b data direction register FFB3 ( f256.d):00285 DDRA equ $FFB3 port a data direction register FFB4 ( f256.d):00286 T1C_L equ $FFB4 timer 1 counter low FFB5 ( f256.d):00287 T1C_H equ $FFB5 timer 1 counter high FFB6 ( f256.d):00288 T1L_L equ $FFB6 timer 1 latch low FFB7 ( f256.d):00289 T1L_H equ $FFB7 timer 1 latch high FFB8 ( f256.d):00290 T2C_L equ $FFB8 timer 2 counter low FFB9 ( f256.d):00291 T2C_H equ $FFB9 timer 2 counter high FFBA ( f256.d):00292 SDR equ $FFBA serial data register FFBB ( f256.d):00293 ACR equ $FFBB auxiliary control register FFBC ( f256.d):00294 PCR equ $FFBC peripheral control register FFBD ( f256.d):00295 IFR equ $FFBD interrupt flag register FFBE ( f256.d):00296 IER equ $FFBE interrupt enable register FFBF ( f256.d):00297 IORA2 equ $FFBF port a data (no handshake) ( f256.d):00298 ( f256.d):00299 * ACR control register values 00C0 ( f256.d):00300 T1_CTRL equ %11000000 0020 ( f256.d):00301 T2_CTRL equ %00100000 001C ( f256.d):00302 SR_CTRL equ %00011100 0002 ( f256.d):00303 PBL_EN equ %00000010 0001 ( f256.d):00304 PAL_EN equ %00000001 ( f256.d):00305 ( f256.d):00306 * PCR control register values 00E0 ( f256.d):00307 CB2_CTRL equ %11100000 0010 ( f256.d):00308 CB1_CTRL equ %00010000 000E ( f256.d):00309 CA2_CTRL equ %00001110 0001 ( f256.d):00310 CA1_CTRL equ %00000001 ( f256.d):00311 ( f256.d):00312 * IFR control register values 0080 ( f256.d):00313 IRQF equ %10000000 0040 ( f256.d):00314 T1F equ %01000000 0020 ( f256.d):00315 T2F equ %00100000 0010 ( f256.d):00316 CB1F equ %00010000 0008 ( f256.d):00317 CB2F equ %00001000 0004 ( f256.d):00318 SRF equ %00000100 0002 ( f256.d):00319 CA1F equ %00000010 0001 ( f256.d):00320 CA2F equ %00000001 ( f256.d):00321 ( f256.d):00322 * IER control register values 0080 ( f256.d):00323 IERSET equ %10000000 0040 ( f256.d):00324 T1E equ %01000000 0020 ( f256.d):00325 T2E equ %00100000 0010 ( f256.d):00326 CB1E equ %00010000 0008 ( f256.d):00327 CB2E equ %00001000 0004 ( f256.d):00328 SRE equ %00000100 0002 ( f256.d):00329 CA1E equ %00000010 0001 ( f256.d):00330 CA2E equ %00000001 ( f256.d):00331 ( f256.d):00332 ******************************************************************** ( f256.d):00333 * F256 real-time clock definitions ( f256.d):00334 * FE40 ( f256.d):00335 RTC.Base equ 0xFE40 0000 ( f256.d):00336 RTC_SEC equ 0x00 seconds register 0001 ( f256.d):00337 RTC_SEC_ALARM equ 0x01 seconds alarm register 0002 ( f256.d):00338 RTC_MIN equ 0x02 minutes register 0003 ( f256.d):00339 RTC_MIN_ALARM equ 0x03 minutes alarm register 0004 ( f256.d):00340 RTC_HRS equ 0x04 hours register 0005 ( f256.d):00341 RTC_HRS_ALARM equ 0x05 hours alarm register 0006 ( f256.d):00342 RTC_DAY equ 0x06 day register 0007 ( f256.d):00343 RTC_DAY_ALARM equ 0x07 day alarm register 0008 ( f256.d):00344 RTC_DOW equ 0x08 day of week register 0009 ( f256.d):00345 RTC_MONTH equ 0x09 month register 000A ( f256.d):00346 RTC_YEAR equ 0x0A year register 000B ( f256.d):00347 RTC_RATES equ 0x0B rates register 000C ( f256.d):00348 RTC_ENABLE equ 0x0C enables register 000D ( f256.d):00349 RTC_FLAGS equ 0x0D flags register 000E ( f256.d):00350 RTC_CTRL equ 0x0E control register 000F ( f256.d):00351 RTC_CENTURY equ 0x0F century register ( f256.d):00352 0002 ( f256.d):00353 RTC_24HR equ $02 12/24 hour flag (1 = 24 Hr, 0 = 12 Hr) 0004 ( f256.d):00354 RTC_STOP equ $04 0 = STOP when power off, 1 = run from battery when power off 0008 ( f256.d):00355 RTC_UTI equ $08 update transfer inhibit ( f256.d):00356 ******************************************************************** ( f256.d):00357 * F256 W65C22S definitions ( f256.d):00358 * FFB0 ( f256.d):00359 VIA_ORB_IRB equ 0xFFB0 output/input register port B FFB1 ( f256.d):00360 VIA_ORA_IRA equ 0xFFB1 output/input register port B FFB2 ( f256.d):00361 VIA_DDRB equ 0xFFB2 data direction port B FFB3 ( f256.d):00362 VIA_DDRA equ 0xFFB3 data direction port A FFB4 ( f256.d):00363 VIA_T1CL equ 0xFFB4 T1C-L FFB5 ( f256.d):00364 VIA_T1CH equ 0xFFB5 T1C-H FFB6 ( f256.d):00365 VIA_T1LL equ 0xFFB6 T1L-L FFB7 ( f256.d):00366 VIA_T1LH equ 0xFFB7 T1L-H FFB8 ( f256.d):00367 VIA_T2CL equ 0xFFB8 T2C-L FFB9 ( f256.d):00368 VIA_T2CH equ 0xFFB9 T2C-H FFBA ( f256.d):00369 VIA_SR equ 0xFFBA SR FFBB ( f256.d):00370 VIA_ACR equ 0xFFBB ACR FFBC ( f256.d):00371 VIA_PCR equ 0xFFBC PCR FFBD ( f256.d):00372 VIA_IFR equ 0xFFBD IFR FFBE ( f256.d):00373 VIA_IER equ 0xFFBE IER FFBF ( f256.d):00374 VIA_ORA_IRA_AUX equ 0xFFBF ORA/IRA ( f256.d):00375 * Definition for where the Joystick Ports are ( f256.d):00376 * Port A (Joystick Port 1) 0001 ( f256.d):00377 JOYA_UP equ 0x01 0002 ( f256.d):00378 JOYA_DWN equ 0x02 0004 ( f256.d):00379 JOYA_LFT equ 0x04 0008 ( f256.d):00380 JOTA_RGT equ 0x08 0010 ( f256.d):00381 JOTA_BUT0 equ 0x10 0020 ( f256.d):00382 JOYA_BUT1 equ 0x20 0040 ( f256.d):00383 JOYA_BUT2 equ 0x40 ( f256.d):00384 * Port B (Joystick Port 0) 0001 ( f256.d):00385 JOYB_UP equ 0x01 0002 ( f256.d):00386 JOYB_DWN equ 0x02 0004 ( f256.d):00387 JOYB_LFT equ 0x04 0008 ( f256.d):00388 JOTB_RGT equ 0x08 0010 ( f256.d):00389 JOTB_BUT0 equ 0x10 0020 ( f256.d):00390 JOYB_BUT1 equ 0x20 0040 ( f256.d):00391 JOYB_BUT2 equ 0x40 ( f256.d):00392 ( f256.d):00393 ******************************************************************** ( f256.d):00394 * F256 UART definitions ( f256.d):00395 * FE60 ( f256.d):00396 UART_TRHB equ 0xFE60 transmit/receive hold buffer FE60 ( f256.d):00397 UART_DLL equ 0xFE60 divisor latch low byte FE61 ( f256.d):00398 UART_DLH equ 0xFE61 divisor latch high byte FE61 ( f256.d):00399 UART_IER equ 0xFE61 interrupt enable register FE62 ( f256.d):00400 UART_FCR equ 0xFE62 FIFO control register FE62 ( f256.d):00401 UART_IIR equ 0xFE62 interrupt identification register FE63 ( f256.d):00402 UART_LCR equ 0xFE63 line control register FE64 ( f256.d):00403 UART_MCR equ 0xFE64 modem control register FE65 ( f256.d):00404 UART_LSR equ 0xFE65 line status register FE66 ( f256.d):00405 UART_MSR equ 0xFE66 modem status register FE67 ( f256.d):00406 UART_SR equ 0xFE67 scratch register ( f256.d):00407 ( f256.d):00408 * FCR register definitions 0000 ( f256.d):00409 FCR_RXT_5 equ 0x00 0040 ( f256.d):00410 FCR_RXT_6 equ 0x40 0080 ( f256.d):00411 FCR_RXT_7 equ 0x80 00C0 ( f256.d):00412 FCR_RXT_8 equ 0xC0 0020 ( f256.d):00413 FCR_FIFO64 equ 0x20 0004 ( f256.d):00414 FCR_TXR equ 0x04 0002 ( f256.d):00415 FCR_RXR equ 0x02 0001 ( f256.d):00416 FCR_FIFOE equ 0x01 ( f256.d):00417 ( f256.d):00418 * Interrupt Enable Flags 0020 ( f256.d):00419 UINT_LOW_POWER equ 0x20 enable low power mode (16750) 0010 ( f256.d):00420 UINT_SLEEP_MODE equ 0x10 enable sleep mode (16750) 0008 ( f256.d):00421 UINT_MODEM_STATUS equ 0x08 enable modem status interrupt 0004 ( f256.d):00422 UINT_LINE_STATUS equ 0x04 enable receiver line status interrupt 0002 ( f256.d):00423 UINT_THR_EMPTY equ 0x02 enable transmit holding register empty interrupt 0001 ( f256.d):00424 UINT_DATA_AVAIL equ 0x01 enable receive data available interrupt ( f256.d):00425 ( f256.d):00426 ; Interrupt Identification Register Codes 0080 ( f256.d):00427 IIR_FIFO_ENABLED equ 0x80 FIFO is enabled 0040 ( f256.d):00428 IIR_FIFO_NONFUNC equ 0x40 FIFO is not functioning 0020 ( f256.d):00429 IIR_FIFO_64BYTE equ 0x20 64 byte FIFO enabled (16750) 0000 ( f256.d):00430 IIR_MODEM_STATUS equ 0x00 modem status interrupt 0002 ( f256.d):00431 IIR_THR_EMPTY equ 0x02 transmit holding register empty interrupt 0004 ( f256.d):00432 IIR_DATA_AVAIL equ 0x04 data available interrupt 0006 ( f256.d):00433 IIR_LINE_STATUS equ 0x06 line status interrupt 000C ( f256.d):00434 IIR_TIMEOUT equ 0x0C time-out interrupt (16550 and later) 0001 ( f256.d):00435 IIR_INTERRUPT_PENDING equ 0x01 interrupt pending flag ( f256.d):00436 ( f256.d):00437 ; Line Control Register Codes 0080 ( f256.d):00438 LCR_DLB equ 0x80 divisor latch access bit 0060 ( f256.d):00439 LCR_SBE equ 0x60 set break enable ( f256.d):00440 0000 ( f256.d):00441 LCR_PARITY_NONE equ 0x00 parity: none 0008 ( f256.d):00442 LCR_PARITY_ODD equ 0x08 parity: odd 0018 ( f256.d):00443 LCR_PARITY_EVEN equ 0x18 parity: even 0028 ( f256.d):00444 LCR_PARITY_MARK equ 0x28 parity: mark 0038 ( f256.d):00445 LCR_PARITY_SPACE equ 0x38 parity: space ( f256.d):00446 0000 ( f256.d):00447 LCR_STOPBIT_1 equ 0x00 one stop bit 0004 ( f256.d):00448 LCR_STOPBIT_2 equ 0x04 1.5 or 2 stop bits ( f256.d):00449 0000 ( f256.d):00450 LCR_DATABITS_5 equ 0x00 data bits: 5 0001 ( f256.d):00451 LCR_DATABITS_6 equ 0x01 data bits: 6 0002 ( f256.d):00452 LCR_DATABITS_7 equ 0x02 data bits: 7 0003 ( f256.d):00453 LCR_DATABITS_8 equ 0x03 data bits: 8 ( f256.d):00454 0080 ( f256.d):00455 LSR_ERR_RECEIVE equ 0x80 error in received fifo 0040 ( f256.d):00456 LSR_XMIT_DONE equ 0x40 all data has been transmitted 0020 ( f256.d):00457 LSR_XMIT_EMPTY equ 0x20 empty transmit holding register 0010 ( f256.d):00458 LSR_BREAK_INT equ 0x10 break interrupt 0008 ( f256.d):00459 LSR_ERR_FRAME equ 0x08 framing error 0004 ( f256.d):00460 LSR_ERR_PARITY equ 0x04 parity error 0002 ( f256.d):00461 LSR_ERR_OVERRUN equ 0x02 overrun error 0001 ( f256.d):00462 LSR_DATA_AVAIL equ 0x01 data is ready in the receive buffer ( f256.d):00463 ( f256.d):00464 ****************************************************************** ( f256.d):00465 * F256 text lookup definitions ( f256.d):00466 * FF00 ( f256.d):00467 TEXT_LUT_FG equ $FF00 FF40 ( f256.d):00468 TEXT_LUT_BG equ $FF40 ( f256.d):00469 ( f256.d):00470 ******************************************************************** ( f256.d):00471 * F256 SD card interface definitions ( f256.d):00472 * FE90 ( f256.d):00473 SDC_BASE_ADDR equ $FE90 0000 ( f256.d):00474 SDC_STAT equ 0 0001 ( f256.d):00475 SDC_DATA equ 1 ( f256.d):00476 ( f256.d):00477 * SDC status bits 0080 ( f256.d):00478 SPI_BUSY equ %10000000 0002 ( f256.d):00479 SPI_CLK equ %00000010 0001 ( f256.d):00480 CS_EN equ %00000001 ( f256.d):00481 FFC0 ( f256.d):00482 MASTER_CTRL_REG_L equ $FFC0 ( f256.d):00483 ;Control Bits Fields 0001 ( f256.d):00484 Mstr_Ctrl_Text_Mode_En equ $01 enable the text mode 0002 ( f256.d):00485 Mstr_Ctrl_Text_Overlay equ $02 enable the overlay of the text mode on top of graphic mode (the background color is ignored) 0004 ( f256.d):00486 Mstr_Ctrl_Graph_Mode_En equ $04 enable the graphic mode 0008 ( f256.d):00487 Mstr_Ctrl_Bitmap_En equ $08 enable the bitmap module in Vicky 0010 ( f256.d):00488 Mstr_Ctrl_TileMap_En equ $10 enable the tile module in Vicky 0020 ( f256.d):00489 Mstr_Ctrl_Sprite_En equ $20 enable the sprite module in Vicky 0040 ( f256.d):00490 Mstr_Ctrl_GAMMA_En equ $40 this enables the gamma correction - the analog and DVI have different color values; the gamma is great to correct the difference 0080 ( f256.d):00491 Mstr_Ctrl_Disable_Vid equ $80 this will disable the scanning of the video hence giving 100% bandwidth to the CPU FFC1 ( f256.d):00492 MASTER_CTRL_REG_H equ $FFC1 0010 ( f256.d):00493 FON_SET equ %0010000 0010 ( f256.d):00494 FON_OVLY equ %00010000 0008 ( f256.d):00495 MON_SLP equ %00001000 0004 ( f256.d):00496 DBL_Y equ %00000100 0002 ( f256.d):00497 DBL_X equ %00000010 0001 ( f256.d):00498 CLK_70 equ %00000001 ( f256.d):00499 ( f256.d):00500 ; Reserved - TBD FFC2 ( f256.d):00501 VKY_RESERVED_00 equ $FFC2 FFC3 ( f256.d):00502 VKY_RESERVED_01 equ $FFC3 ( f256.d):00503 ; FFC4 ( f256.d):00504 BORDER_CTRL_REG equ $FFC4 bit[0] - enable (1 by default) bit[4..6]: X scroll offset (will scroll left) (acceptable values: 0..7) 0001 ( f256.d):00505 Border_Ctrl_Enable equ $01 FFC5 ( f256.d):00506 BORDER_COLOR_B equ $FFC5 FFC6 ( f256.d):00507 BORDER_COLOR_G equ $FFC6 FFC7 ( f256.d):00508 BORDER_COLOR_R equ $FFC7 FFC8 ( f256.d):00509 BORDER_X_SIZE equ $FFC8 X values: 0 - 32 (default: 32) FFC9 ( f256.d):00510 BORDER_Y_SIZE equ $FFC9 Y values: 0 - 32 (default: 32) ( f256.d):00511 ; Reserved - TBD FFCA ( f256.d):00512 VKY_RESERVED_02 equ $FFCA FFCB ( f256.d):00513 VKY_RESERVED_03 equ $FFCB FFCC ( f256.d):00514 VKY_RESERVED_04 equ $FFCC ( f256.d):00515 ; Valid in Graphics Mode Only FFCD ( f256.d):00516 BACKGROUND_COLOR_B equ $FFCD when in graphic mode, if a pixel is "0" then the background pixel is chosen FFCE ( f256.d):00517 BACKGROUND_COLOR_G equ $FFCE FFCF ( f256.d):00518 BACKGROUND_COLOR_R equ $FFCF ( f256.d):00519 ; Cursor Registers FFD0 ( f256.d):00520 VKY_TXT_CURSOR_CTRL_REG equ $FFD0 [0] Enable Text Mode 0001 ( f256.d):00521 Vky_Cursor_Enable equ $01 0002 ( f256.d):00522 Vky_Cursor_Flash_Rate0 equ $02 0004 ( f256.d):00523 Vky_Cursor_Flash_Rate1 equ $04 0008 ( f256.d):00524 Vky_Cursor_Flash_Disable equ $08 FFD1 ( f256.d):00525 VKY_TXT_START_ADD_PTR equ $FFD1 this is an offset to change the starting address of the text mode Buffer (in X) FFD2 ( f256.d):00526 VKY_TXT_CURSOR_CHAR_REG equ $FFD2 FFD3 ( f256.d):00527 VKY_TXT_CURSOR_COLR_REG equ $FFD3 FFD4 ( f256.d):00528 VKY_TXT_CURSOR_X_REG_L equ $FFD4 FFD5 ( f256.d):00529 VKY_TXT_CURSOR_X_REG_H equ $FFD5 FFD6 ( f256.d):00530 VKY_TXT_CURSOR_Y_REG_L equ $FFD6 FFD7 ( f256.d):00531 VKY_TXT_CURSOR_Y_REG_H equ $FFD7 ( f256.d):00532 ; Line interrupt FFD8 ( f256.d):00533 VKY_LINE_IRQ_CTRL_REG equ $FFD8 [0] - enable line 0 - write only FFD9 ( f256.d):00534 VKY_LINE_CMP_VALUE_LO equ $FFD9 write only [7:0] FFDA ( f256.d):00535 VKY_LINE_CMP_VALUE_HI equ $FFDA write only [3:0] ( f256.d):00536 FFD8 ( f256.d):00537 VKY_PIXEL_X_POS_LO equ $FFD8 this is where on the video line is the pixel FFD9 ( f256.d):00538 VKY_PIXEL_X_POS_HI equ $FFD9 or what pixel is being displayed when the register is read FFDA ( f256.d):00539 VKY_LINE_Y_POS_LO equ $FFDA this is the line value of the raster FFDB ( f256.d):00540 VKY_LINE_Y_POS_HI equ $FFDB ( f256.d):00541 ( f256.d):00542 ; Bitmap ( f256.d):00543 ;BM0 F000 ( f256.d):00544 TyVKY_BM0_CTRL_REG equ $F000 0001 ( f256.d):00545 BM0_Ctrl equ $01 enable the BM0 0002 ( f256.d):00546 BM0_LUT0 equ $02 LUT0 0004 ( f256.d):00547 BM0_LUT1 equ $04 LUT1 F001 ( f256.d):00548 TyVKY_BM0_START_ADDY_L equ $F001 F002 ( f256.d):00549 TyVKY_BM0_START_ADDY_M equ $F002 F003 ( f256.d):00550 TyVKY_BM0_START_ADDY_H equ $F003 ( f256.d):00551 ;BM1 F008 ( f256.d):00552 TyVKY_BM1_CTRL_REG equ $F008 0001 ( f256.d):00553 BM1_Ctrl equ $01 enable the BM0 0002 ( f256.d):00554 BM1_LUT0 equ $02 LUT0 0004 ( f256.d):00555 BM1_LUT1 equ $04 LUT1 F009 ( f256.d):00556 TyVKY_BM1_START_ADDY_L equ $F009 F00A ( f256.d):00557 TyVKY_BM1_START_ADDY_M equ $F00A F00B ( f256.d):00558 TyVKY_BM1_START_ADDY_H equ $F00B ( f256.d):00559 ;BM2 F010 ( f256.d):00560 TyVKY_BM2_CTRL_REG equ $F010 0001 ( f256.d):00561 BM2_Ctrl equ $01 enable the BM0 0002 ( f256.d):00562 BM2_LUT0 equ $02 LUT0 0004 ( f256.d):00563 BM2_LUT1 equ $04 LUT1 0008 ( f256.d):00564 BM2_LUT2 equ $08 LUT2 F011 ( f256.d):00565 TyVKY_BM2_START_ADDY_L equ $F011 F012 ( f256.d):00566 TyVKY_BM2_START_ADDY_M equ $F012 F013 ( f256.d):00567 TyVKY_BM2_START_ADDY_H equ $F013 ( f256.d):00568 ( f256.d):00569 ( f256.d):00570 ; Tile map F100 ( f256.d):00571 TyVKY_TL_CTRL0 equ $F100 ( f256.d):00572 ; Bit Field Definition for the Control Register 0001 ( f256.d):00573 TILE_Enable equ $01 0002 ( f256.d):00574 TILE_LUT0 equ $02 0004 ( f256.d):00575 TILE_LUT1 equ $04 0008 ( f256.d):00576 TILE_LUT2 equ $08 0010 ( f256.d):00577 TILE_SIZE equ $10 0 -> 16x16, 0 -> 8x8 ( f256.d):00578 ( f256.d):00579 ; ( f256.d):00580 ;Tile mao layer 0 registers F100 ( f256.d):00581 TL0_CONTROL_REG equ $F100 bit[0] - enable, bit[3:1] - LUT select F101 ( f256.d):00582 TL0_START_ADDY_L equ $F101 not used right now - starting address to where is the map F102 ( f256.d):00583 TL0_START_ADDY_M equ $F102 F103 ( f256.d):00584 TL0_START_ADDY_H equ $F103 F104 ( f256.d):00585 TL0_MAP_X_SIZE_L equ $F104 the size X of the map F105 ( f256.d):00586 TL0_MAP_X_SIZE_H equ $F105 F106 ( f256.d):00587 TL0_MAP_Y_SIZE_L equ $F106 the size Y of the map F107 ( f256.d):00588 TL0_MAP_Y_SIZE_H equ $F107 F108 ( f256.d):00589 TL0_MAP_X_POS_L equ $F108 the position X of the map F109 ( f256.d):00590 TL0_MAP_X_POS_H equ $F109 F10A ( f256.d):00591 TL0_MAP_Y_POS_L equ $F10A the position Y of the map F10B ( f256.d):00592 TL0_MAP_Y_POS_H equ $F10B ( f256.d):00593 ;Tile MAP Layer 1 Registers F10C ( f256.d):00594 TL1_CONTROL_REG equ $F10C bit[0] - enable, bit[3:1] - LUT select F10D ( f256.d):00595 TL1_START_ADDY_L equ $F10D not used right now - starting address to where is the map F10E ( f256.d):00596 TL1_START_ADDY_M equ $F10E F10F ( f256.d):00597 TL1_START_ADDY_H equ $F10F F110 ( f256.d):00598 TL1_MAP_X_SIZE_L equ $F110 the size X of the map F111 ( f256.d):00599 TL1_MAP_X_SIZE_H equ $F111 F112 ( f256.d):00600 TL1_MAP_Y_SIZE_L equ $F112 the size Y of the map F113 ( f256.d):00601 TL1_MAP_Y_SIZE_H equ $F113 F114 ( f256.d):00602 TL1_MAP_X_POS_L equ $F114 the position X of the map F115 ( f256.d):00603 TL1_MAP_X_POS_H equ $F115 F116 ( f256.d):00604 TL1_MAP_Y_POS_L equ $F116 the position Y of the map F117 ( f256.d):00605 TL1_MAP_Y_POS_H equ $F117 ( f256.d):00606 ;Tile MAP Layer 2 Registers F118 ( f256.d):00607 TL2_CONTROL_REG equ $F118 bit[0] - enable, bit[3:1] - LUT select, F119 ( f256.d):00608 TL2_START_ADDY_L equ $F119 not used right now - starting address to where is the map F11A ( f256.d):00609 TL2_START_ADDY_M equ $F11A F11B ( f256.d):00610 TL2_START_ADDY_H equ $F11B F11C ( f256.d):00611 TL2_MAP_X_SIZE_L equ $F11C the size X of the map F11D ( f256.d):00612 TL2_MAP_X_SIZE_H equ $F11D F11E ( f256.d):00613 TL2_MAP_Y_SIZE_L equ $F11E the size Y of the map F11F ( f256.d):00614 TL2_MAP_Y_SIZE_H equ $F11F F120 ( f256.d):00615 TL2_MAP_X_POS_L equ $F120 the position X of the map F121 ( f256.d):00616 TL2_MAP_X_POS_H equ $F121 F122 ( f256.d):00617 TL2_MAP_Y_POS_L equ $F122 the position Y of the map F123 ( f256.d):00618 TL2_MAP_Y_POS_H equ $F123 ( f256.d):00619 ( f256.d):00620 F180 ( f256.d):00621 TILE_MAP_ADDY0_L equ $F180 F181 ( f256.d):00622 TILE_MAP_ADDY0_M equ $F181 F182 ( f256.d):00623 TILE_MAP_ADDY0_H equ $F182 F183 ( f256.d):00624 TILE_MAP_ADDY0_CFG equ $F183 F184 ( f256.d):00625 TILE_MAP_ADDY1 equ $F184 F188 ( f256.d):00626 TILE_MAP_ADDY2 equ $F188 F18C ( f256.d):00627 TILE_MAP_ADDY3 equ $F18C F190 ( f256.d):00628 TILE_MAP_ADDY4 equ $F190 F194 ( f256.d):00629 TILE_MAP_ADDY5 equ $F194 F198 ( f256.d):00630 TILE_MAP_ADDY6 equ $F198 F19C ( f256.d):00631 TILE_MAP_ADDY7 equ $F19C ( f256.d):00632 ( f256.d):00633 D300 ( f256.d):00634 XYMATH_CTRL_REG equ $D300 reserved D301 ( f256.d):00635 XYMATH_ADDY_L equ $D301 w D302 ( f256.d):00636 XYMATH_ADDY_M equ $D302 w D303 ( f256.d):00637 XYMATH_ADDY_H equ $D303 w D304 ( f256.d):00638 XYMATH_ADDY_POSX_L equ $D304 r/w D305 ( f256.d):00639 XYMATH_ADDY_POSX_H equ $D305 r/w D306 ( f256.d):00640 XYMATH_ADDY_POSY_L equ $D306 r/w D307 ( f256.d):00641 XYMATH_ADDY_POSY_H equ $D307 r/w D308 ( f256.d):00642 XYMATH_BLOCK_OFF_L equ $D308 r only - low block offset D309 ( f256.d):00643 XYMATH_BLOCK_OFF_H equ $D309 r only - hi block offset D30A ( f256.d):00644 XYMATH_MMU_BLOCK equ $D30A r only - which mmu block D30B ( f256.d):00645 XYMATH_ABS_ADDY_L equ $D30B low absolute results D30C ( f256.d):00646 XYMATH_ABS_ADDY_M equ $D30C mid absolute results D30D ( f256.d):00647 XYMATH_ABS_ADDY_H equ $D30D hi absolute results ( f256.d):00648 ( f256.d):00649 ; Sprite block0 0001 ( f256.d):00650 SPRITE_Ctrl_Enable equ $01 0002 ( f256.d):00651 SPRITE_LUT0 equ $02 0004 ( f256.d):00652 SPRITE_LUT1 equ $04 0008 ( f256.d):00653 SPRITE_DEPTH0 equ $08 00 = total front - 01 = in between l0 and l1, 10 = in between l1 and l2, 11 = total back 0010 ( f256.d):00654 SPRITE_DEPTH1 equ $10 0020 ( f256.d):00655 SPRITE_SIZE0 equ $20 00 = 32x32 - 01 = 24x24 - 10 = 16x16 - 11 = 8x8 0040 ( f256.d):00656 SPRITE_SIZE1 equ $40 ( f256.d):00657 ( f256.d):00658 F300 ( f256.d):00659 SP0_Ctrl equ $F300 F301 ( f256.d):00660 SP0_Addy_L equ $F301 F302 ( f256.d):00661 SP0_Addy_M equ $F302 F303 ( f256.d):00662 SP0_Addy_H equ $F303 F304 ( f256.d):00663 SP0_X_L equ $F304 F305 ( f256.d):00664 SP0_X_H equ $F305 F306 ( f256.d):00665 SP0_Y_L equ $F306 in the Jr, only the l is used (200 & 240) F307 ( f256.d):00666 SP0_Y_H equ $F307 always keep @ zero '0' because in Vicky the value is still considered a 16bits value ( f256.d):00667 F308 ( f256.d):00668 SP1_Ctrl equ $F308 F309 ( f256.d):00669 SP1_Addy_L equ $F309 F30A ( f256.d):00670 SP1_Addy_M equ $F30A F30B ( f256.d):00671 SP1_Addy_H equ $F30B F30C ( f256.d):00672 SP1_X_L equ $F30C F30D ( f256.d):00673 SP1_X_H equ $F30D F30E ( f256.d):00674 SP1_Y_L equ $F30E in the Jr, only the l is used (200 & 240) F30F ( f256.d):00675 SP1_Y_H equ $F30F always keep @ zero '0' because in Vicky the value is still considered a 16bits value ( f256.d):00676 F310 ( f256.d):00677 SP2_Ctrl equ $F310 F311 ( f256.d):00678 SP2_Addy_L equ $F311 F312 ( f256.d):00679 SP2_Addy_M equ $F312 F313 ( f256.d):00680 SP2_Addy_H equ $F313 F314 ( f256.d):00681 SP2_X_L equ $F314 F315 ( f256.d):00682 SP2_X_H equ $F315 F316 ( f256.d):00683 SP2_Y_L equ $F316 in the Jr, only the l is used (200 & 240) F317 ( f256.d):00684 SP2_Y_H equ $F317 always keep @ zero '0' because in Vicky the value is still considered a 16bits value ( f256.d):00685 F318 ( f256.d):00686 SP3_Ctrl equ $F318 F319 ( f256.d):00687 SP3_Addy_L equ $F319 F31A ( f256.d):00688 SP3_Addy_M equ $F31A F31B ( f256.d):00689 SP3_Addy_H equ $F31B F31C ( f256.d):00690 SP3_X_L equ $F31C F31D ( f256.d):00691 SP3_X_H equ $F31D F31E ( f256.d):00692 SP3_Y_L equ $F31E in the Jr, only the l is used (200 & 240) F31F ( f256.d):00693 SP3_Y_H equ $F31F always keep @ zero '0' because in Vicky the value is still considered a 16bits value ( f256.d):00694 F320 ( f256.d):00695 SP4_Ctrl equ $F320 F321 ( f256.d):00696 SP4_Addy_L equ $F321 F322 ( f256.d):00697 SP4_Addy_M equ $F322 F323 ( f256.d):00698 SP4_Addy_H equ $F323 F324 ( f256.d):00699 SP4_X_L equ $F324 F325 ( f256.d):00700 SP4_X_H equ $F325 F326 ( f256.d):00701 SP4_Y_L equ $F326 in the Jr, only the l is used (200 & 240) F327 ( f256.d):00702 SP4_Y_H equ $F327 always keep @ zero '0' because in Vicky the value is still considered a 16bits value ( f256.d):00703 ( f256.d):00704 ( f256.d):00705 ( f256.d):00706 ( f256.d):00707 ; PAGE $C1 E800 ( f256.d):00708 TyVKY_LUT0 equ $E800 -$d000 - $d3ff EC00 ( f256.d):00709 TyVKY_LUT1 equ $EC00 -$d400 - $d7ff F000 ( f256.d):00710 TyVKY_LUT2 equ $F000 -$d800 - $dbff F400 ( f256.d):00711 TyVKY_LUT3 equ $F400 -$dc00 - $dfff ( f256.d):00712 ( f256.d):00713 ( f256.d):00714 ;DMA FEE0 ( f256.d):00715 DMA_CTRL_REG equ $FEE0 0001 ( f256.d):00716 DMA_CTRL_Enable equ $01 0002 ( f256.d):00717 DMA_CTRL_1D_2D equ $02 0004 ( f256.d):00718 DMA_CTRL_Fill equ $04 0008 ( f256.d):00719 DMA_CTRL_Int_En equ $08 0010 ( f256.d):00720 DMA_CTRL_NotUsed0 equ $10 0020 ( f256.d):00721 DMA_CTRL_NotUsed1 equ $20 0040 ( f256.d):00722 DMA_CTRL_NotUsed2 equ $40 0080 ( f256.d):00723 DMA_CTRL_Start_Trf equ $80 ( f256.d):00724 FEE1 ( f256.d):00725 DMA_DATA_2_WRITE equ $FEE1 write only FEE1 ( f256.d):00726 DMA_STATUS_REG equ $FEE1 read only 0080 ( f256.d):00727 DMA_STATUS_TRF_IP equ $80 transfer in progress FEE2 ( f256.d):00728 DMA_RESERVED_0 equ $FEE2 FEE3 ( f256.d):00729 DMA_RESERVED_1 equ $FEE3 ( f256.d):00730 ( f256.d):00731 ; Source addy FEE4 ( f256.d):00732 DMA_SOURCE_ADDY_L equ $FEE4 FEE5 ( f256.d):00733 DMA_SOURCE_ADDY_M equ $FEE5 FEE6 ( f256.d):00734 DMA_SOURCE_ADDY_H equ $FEE6 FEE7 ( f256.d):00735 DMA_RESERVED_2 equ $FEE7 ( f256.d):00736 ; Destination Addy FEE8 ( f256.d):00737 DMA_DEST_ADDY_L equ $FEE8 FEE9 ( f256.d):00738 DMA_DEST_ADDY_M equ $FEE9 FEEA ( f256.d):00739 DMA_DEST_ADDY_H equ $FEEA FEEB ( f256.d):00740 DMA_RESERVED_3 equ $FEEB ( f256.d):00741 ; Size in 1D Mode FEEC ( f256.d):00742 DMA_SIZE_1D_L equ $FEEC FEED ( f256.d):00743 DMA_SIZE_1D_M equ $FEED FEEE ( f256.d):00744 DMA_SIZE_1D_H equ $FEEE FEEF ( f256.d):00745 DMA_RESERVED_4 equ $FEEF ( f256.d):00746 ; Size in 2D Mode FEEC ( f256.d):00747 DMA_SIZE_X_L equ $FEEC FEED ( f256.d):00748 DMA_SIZE_X_H equ $FEED FEEE ( f256.d):00749 DMA_SIZE_Y_L equ $FEEE FEEF ( f256.d):00750 DMA_SIZE_Y_H equ $FEEF ( f256.d):00751 ; Stride in 2D Mode FEF0 ( f256.d):00752 DMA_SRC_STRIDE_X_L equ $FEF0 FEF1 ( f256.d):00753 DMA_SRC_STRIDE_X_H equ $FEF1 FEF2 ( f256.d):00754 DMA_DST_STRIDE_Y_L equ $FEF2 FEF3 ( f256.d):00755 DMA_DST_STRIDE_Y_H equ $FEF3 ( f256.d):00756 FEF4 ( f256.d):00757 DMA_RESERVED_5 equ $FEF4 FEF5 ( f256.d):00758 DMA_RESERVED_6 equ $FEF5 FEF6 ( f256.d):00759 DMA_RESERVED_7 equ $FEF6 FEF7 ( f256.d):00760 DMA_RESERVED_8 equ $FEF7 ( f256.d):00761 endc ( defs.d):00028 ( defs.d):00029 * F256 Jr. mapped I/O boundaries FE00 ( defs.d):00030 MappedIOStart equ $FE00 FFFF ( defs.d):00031 MappedIOEnd equ $FFFF ( defs.d):00032 ( defs.d):00033 * F256 Jr. ticks per second support 003C ( defs.d):00034 TkPerSec set 60 ( go.asm):00019 0011 ( go.asm):00020 tylg set Prgrm+Objct 0081 ( go.asm):00021 atrv set ReEnt+rev 0001 ( go.asm):00022 rev set $01 0001 ( go.asm):00023 edition set 1 ( go.asm):00024 0000 87CD0465000D1181 ( go.asm):00025 mod eom,name,tylg,atrv,start,size 49001000C8 ( go.asm):00026 ( go.asm):00027 org 0 0000. ( go.asm):00028 stack rmb 200 00C8 ( go.asm):00029 size equ . ( go.asm):00030 000D 67EF ( go.asm):00031 name fcs /go/ 000F 01 ( go.asm):00032 fcb edition ( go.asm):00033 ( go.asm):00034 * This is an F256 Jr. specific program that sets up the screen and puts a ( go.asm):00035 * simple message on the screen. 0010 ( go.asm):00036 start ( go.asm):00037 ( go.asm):00038 * Initialize display. 0010 3401 ( go.asm):00039 pshs cc 0012 1A50 ( go.asm):00040 orcc #IntMasks ( go.asm):00041 0014 8601 ( go.asm):00042 lda #Mstr_Ctrl_Text_Mode_En 0016 B7FFC0 ( go.asm):00043 sta MASTER_CTRL_REG_L 0019 7FFFC1 ( go.asm):00044 clr MASTER_CTRL_REG_H 001C 7FFFC4 ( go.asm):00045 clr BORDER_CTRL_REG 001F 7FFFC7 ( go.asm):00046 clr BORDER_COLOR_R 0022 7FFFC6 ( go.asm):00047 clr BORDER_COLOR_G 0025 7FFFC5 ( go.asm):00048 clr BORDER_COLOR_B 0028 7FFFD0 ( go.asm):00049 clr VKY_TXT_CURSOR_CTRL_REG ( go.asm):00050 ( go.asm):00051 * Initialize gamma. 002B B6FFA9 ( go.asm):00052 lda MMU_SLOT_1 002E 3402 ( go.asm):00053 pshs a 0030 86C0 ( go.asm):00054 lda #$C0 0032 B7FFA9 ( go.asm):00055 sta MMU_SLOT_1 0035 CC0000 ( go.asm):00056 ldd #0 0038 1F01 ( go.asm):00057 x1@ tfr d,x 003A E7892000 ( go.asm):00058 stb $2000,x 003E E7892400 ( go.asm):00059 stb $2400,x 0042 E7892800 ( go.asm):00060 stb $2800,x 0046 5C ( go.asm):00061 incb 0047 26EF ( go.asm):00062 bne x1@ ( go.asm):00063 ( go.asm):00064 * Initialize palette. 0049 308C76 ( go.asm):00065 leax palette,pcr 004C 108EFF00 ( go.asm):00066 ldy #TEXT_LUT_FG 0050 8D5C ( go.asm):00067 bsr copypal ( go.asm):00068 0052 308C6D ( go.asm):00069 leax palette,pcr 0055 108EFF40 ( go.asm):00070 ldy #TEXT_LUT_BG 0059 8D53 ( go.asm):00071 bsr copypal ( go.asm):00072 ( go.asm):00073 * Install font. 005B 86C1 ( go.asm):00074 lda #$C1 005D B7FFA9 ( go.asm):00075 sta MMU_SLOT_1 0060 308D009E ( go.asm):00076 leax font,pcr 0064 108E20A0 ( go.asm):00077 ldy #$2000+(8*20) 0068 EC81 ( go.asm):00078 loop@ ldd ,x++ 006A EDA1 ( go.asm):00079 std ,y++ 006C 108C2800 ( go.asm):00080 cmpy #$2000+2048 0070 26F6 ( go.asm):00081 bne loop@ ( go.asm):00082 ( go.asm):00083 * Set foreground/background character LUT values. 0072 86C3 ( go.asm):00084 lda #$C3 0074 B7FFA9 ( go.asm):00085 sta MMU_SLOT_1 0077 CC1010 ( go.asm):00086 ldd #$10*256+$10 007A 8D27 ( go.asm):00087 bsr clr ( go.asm):00088 ( go.asm):00089 * Clear text screen. 007C 86C2 ( go.asm):00090 lda #$C2 007E B7FFA9 ( go.asm):00091 sta MMU_SLOT_1 0081 CC2020 ( go.asm):00092 ldd #$20*256+$20 0084 8D1D ( go.asm):00093 bsr clr 0086 3502 ( go.asm):00094 puls a 0088 B7FFA9 ( go.asm):00095 sta MMU_SLOT_1 008B 3501 ( go.asm):00096 puls cc ( go.asm):00097 008D 8611 ( go.asm):00098 lda #Prgrm+Objct 008F C601 ( go.asm):00099 ldb #$01 0091 308C0C ( go.asm):00100 leax go2,pcr 0094 108E0000 ( go.asm):00101 ldy #$0000 0098 103F03 ( go.asm):00102 os9 F$Fork ( go.asm):00103 009B 103F04 ( go.asm):00104 os9 F$Wait 009E ( go.asm):00105 forever@ 009E 20FE ( go.asm):00106 bra forever@ ( go.asm):00107 00A0 676FB2 ( go.asm):00108 go2 fcs /go2/ ( go.asm):00109 ( go.asm):00110 * Clear screen memory. 00A3 8E2000 ( go.asm):00111 clr ldx #$2000 00A6 ED81 ( go.asm):00112 loop@ std ,x++ 00A8 8C3310 ( go.asm):00113 cmpx #$2000+80*61 00AB 26F9 ( go.asm):00114 bne loop@ 00AD 39 ( go.asm):00115 rts ( go.asm):00116 00AE CE0040 ( go.asm):00117 copypal ldu #64 00B1 EC81 ( go.asm):00118 loop@ ldd ,x++ 00B3 EDA1 ( go.asm):00119 std ,y++ 00B5 EC81 ( go.asm):00120 ldd ,x++ 00B7 EDA1 ( go.asm):00121 std ,y++ 00B9 335C ( go.asm):00122 leau -4,u 00BB 11830000 ( go.asm):00123 cmpu #0000 00BF 26F0 ( go.asm):00124 bne loop@ 00C1 39 ( go.asm):00125 rts ( go.asm):00126 00C2 00000000 ( go.asm):00127 palette fcb $00,$00,$00,$00 00C6 FFFFFF00 ( go.asm):00128 fcb $ff,$ff,$ff,$00 00CA 00008800 ( go.asm):00129 fcb $00,$00,$88,$00 00CE EEFFAA00 ( go.asm):00130 fcb $ee,$ff,$aa,$00 00D2 CC4CCC00 ( go.asm):00131 fcb $cc,$4c,$cc,$00 00D6 55CC0000 ( go.asm):00132 fcb $55,$cc,$00,$00 00DA AA000000 ( go.asm):00133 fcb $aa,$00,$00,$00 00DE 77DDDD00 ( go.asm):00134 fcb $77,$dd,$dd,$00 00E2 5588DD00 ( go.asm):00135 fcb $55,$88,$dd,$00 00E6 00446600 ( go.asm):00136 fcb $00,$44,$66,$00 00EA 7777FF00 ( go.asm):00137 fcb $77,$77,$ff,$00 00EE 33333300 ( go.asm):00138 fcb $33,$33,$33,$00 00F2 77777700 ( go.asm):00139 fcb $77,$77,$77,$00 00F6 66FFAA00 ( go.asm):00140 fcb $66,$ff,$aa,$00 00FA FF880000 ( go.asm):00141 fcb $ff,$88,$00,$00 00FE BBBBBB00 ( go.asm):00142 fcb $bb,$bb,$bb,$00 ( go.asm):00143 0102 ( go.asm):00144 font ( go.asm):00145 use "8x8.fcb" ( 8x8.fcb):00001 ( 8x8.fcb):00002 ; 'a 0102 00 ( 8x8.fcb):00003 fcb %00000000 0103 07 ( 8x8.fcb):00004 fcb %00000111 0104 0C ( 8x8.fcb):00005 fcb %00001100 0105 18 ( 8x8.fcb):00006 fcb %00011000 0106 3C ( 8x8.fcb):00007 fcb %00111100 0107 60 ( 8x8.fcb):00008 fcb %01100000 0108 7E ( 8x8.fcb):00009 fcb %01111110 0109 01 ( 8x8.fcb):00010 fcb %00000001 ( 8x8.fcb):00011 ( 8x8.fcb):00012 ; 'b 010A 00 ( 8x8.fcb):00013 fcb %00000000 010B 02 ( 8x8.fcb):00014 fcb %00000010 010C 6C ( 8x8.fcb):00015 fcb %01101100 010D 38 ( 8x8.fcb):00016 fcb %00111000 010E 78 ( 8x8.fcb):00017 fcb %01111000 010F 0C ( 8x8.fcb):00018 fcb %00001100 0110 06 ( 8x8.fcb):00019 fcb %00000110 0111 01 ( 8x8.fcb):00020 fcb %00000001 ( 8x8.fcb):00021 ( 8x8.fcb):00022 ( 8x8.fcb):00023 ; 'ch 0112 00 ( 8x8.fcb):00024 fcb %00000000 0113 01 ( 8x8.fcb):00025 fcb %00000001 0114 31 ( 8x8.fcb):00026 fcb %00110001 0115 69 ( 8x8.fcb):00027 fcb %01101001 0116 47 ( 8x8.fcb):00028 fcb %01000111 0117 03 ( 8x8.fcb):00029 fcb %00000011 0118 1E ( 8x8.fcb):00030 fcb %00011110 0119 00 ( 8x8.fcb):00031 fcb %00000000 ( 8x8.fcb):00032 ( 8x8.fcb):00033 ( 8x8.fcb):00034 ; 'D 011A 00 ( 8x8.fcb):00035 fcb %00000000 011B 08 ( 8x8.fcb):00036 fcb %00001000 011C 08 ( 8x8.fcb):00037 fcb %00001000 011D 0C ( 8x8.fcb):00038 fcb %00001100 011E 26 ( 8x8.fcb):00039 fcb %00100110 011F 43 ( 8x8.fcb):00040 fcb %01000011 0120 2E ( 8x8.fcb):00041 fcb %00101110 0121 00 ( 8x8.fcb):00042 fcb %00000000 ( 8x8.fcb):00043 ( 8x8.fcb):00044 ; 'e 0122 00 ( 8x8.fcb):00045 fcb %00000000 0123 7E ( 8x8.fcb):00046 fcb %01111110 0124 60 ( 8x8.fcb):00047 fcb %01100000 0125 60 ( 8x8.fcb):00048 fcb %01100000 0126 60 ( 8x8.fcb):00049 fcb %01100000 0127 60 ( 8x8.fcb):00050 fcb %01100000 0128 40 ( 8x8.fcb):00051 fcb %01000000 0129 00 ( 8x8.fcb):00052 fcb %00000000 ( 8x8.fcb):00053 ( 8x8.fcb):00054 ; 'gh 012A 00 ( 8x8.fcb):00055 fcb %00000000 012B 3F ( 8x8.fcb):00056 fcb %00111111 012C 0C ( 8x8.fcb):00057 fcb %00001100 012D 0C ( 8x8.fcb):00058 fcb %00001100 012E 0C ( 8x8.fcb):00059 fcb %00001100 012F 1C ( 8x8.fcb):00060 fcb %00011100 0130 7F ( 8x8.fcb):00061 fcb %01111111 0131 00 ( 8x8.fcb):00062 fcb %00000000 ( 8x8.fcb):00063 ( 8x8.fcb):00064 ; 'H 0132 00 ( 8x8.fcb):00065 fcb %00000000 0133 18 ( 8x8.fcb):00066 fcb %00011000 0134 34 ( 8x8.fcb):00067 fcb %00110100 0135 66 ( 8x8.fcb):00068 fcb %01100110 0136 3C ( 8x8.fcb):00069 fcb %00111100 0137 0C ( 8x8.fcb):00070 fcb %00001100 0138 06 ( 8x8.fcb):00071 fcb %00000110 0139 03 ( 8x8.fcb):00072 fcb %00000011 ( 8x8.fcb):00073 ( 8x8.fcb):00074 ; 'I 013A 00 ( 8x8.fcb):00075 fcb %00000000 013B 33 ( 8x8.fcb):00076 fcb %00110011 013C 63 ( 8x8.fcb):00077 fcb %01100011 013D 73 ( 8x8.fcb):00078 fcb %01110011 013E 3E ( 8x8.fcb):00079 fcb %00111110 013F 0C ( 8x8.fcb):00080 fcb %00001100 0140 06 ( 8x8.fcb):00081 fcb %00000110 0141 03 ( 8x8.fcb):00082 fcb %00000011 ( 8x8.fcb):00083 ( 8x8.fcb):00084 ; 'j 0142 00 ( 8x8.fcb):00085 fcb %00000000 0143 7F ( 8x8.fcb):00086 fcb %01111111 0144 1B ( 8x8.fcb):00087 fcb %00011011 0145 33 ( 8x8.fcb):00088 fcb %00110011 0146 36 ( 8x8.fcb):00089 fcb %00110110 0147 26 ( 8x8.fcb):00090 fcb %00100110 0148 44 ( 8x8.fcb):00091 fcb %01000100 0149 00 ( 8x8.fcb):00092 fcb %00000000 ( 8x8.fcb):00093 ( 8x8.fcb):00094 ; 'l 014A 00 ( 8x8.fcb):00095 fcb %00000000 014B 06 ( 8x8.fcb):00096 fcb %00000110 014C 0F ( 8x8.fcb):00097 fcb %00001111 014D 18 ( 8x8.fcb):00098 fcb %00011000 014E 30 ( 8x8.fcb):00099 fcb %00110000 014F 60 ( 8x8.fcb):00100 fcb %01100000 0150 7E ( 8x8.fcb):00101 fcb %01111110 0151 03 ( 8x8.fcb):00102 fcb %00000011 ( 8x8.fcb):00103 ( 8x8.fcb):00104 ; 'm 0152 00 ( 8x8.fcb):00105 fcb %00000000 0153 0E ( 8x8.fcb):00106 fcb %00001110 0154 33 ( 8x8.fcb):00107 fcb %00110011 0155 63 ( 8x8.fcb):00108 fcb %01100011 0156 64 ( 8x8.fcb):00109 fcb %01100100 0157 30 ( 8x8.fcb):00110 fcb %00110000 0158 18 ( 8x8.fcb):00111 fcb %00011000 0159 08 ( 8x8.fcb):00112 fcb %00001000 ( 8x8.fcb):00113 ( 8x8.fcb):00114 ; 'n 015A 00 ( 8x8.fcb):00115 fcb %00000000 015B 38 ( 8x8.fcb):00116 fcb %00111000 015C 6C ( 8x8.fcb):00117 fcb %01101100 015D 60 ( 8x8.fcb):00118 fcb %01100000 015E 3E ( 8x8.fcb):00119 fcb %00111110 015F 18 ( 8x8.fcb):00120 fcb %00011000 0160 0C ( 8x8.fcb):00121 fcb %00001100 0161 06 ( 8x8.fcb):00122 fcb %00000110 ( 8x8.fcb):00123 ( 8x8.fcb):00124 ( 8x8.fcb):00125 ( 8x8.fcb):00126 ; ' ' 0162 00 ( 8x8.fcb):00127 fcb %00000000 0163 00 ( 8x8.fcb):00128 fcb %00000000 0164 00 ( 8x8.fcb):00129 fcb %00000000 0165 00 ( 8x8.fcb):00130 fcb %00000000 0166 00 ( 8x8.fcb):00131 fcb %00000000 0167 00 ( 8x8.fcb):00132 fcb %00000000 0168 00 ( 8x8.fcb):00133 fcb %00000000 0169 00 ( 8x8.fcb):00134 fcb %00000000 ( 8x8.fcb):00135 ( 8x8.fcb):00136 ; '!' 016A 00 ( 8x8.fcb):00137 fcb %00000000 016B 18 ( 8x8.fcb):00138 fcb %00011000 016C 18 ( 8x8.fcb):00139 fcb %00011000 016D 18 ( 8x8.fcb):00140 fcb %00011000 016E 00 ( 8x8.fcb):00141 fcb %00000000 016F 18 ( 8x8.fcb):00142 fcb %00011000 0170 00 ( 8x8.fcb):00143 fcb %00000000 0171 00 ( 8x8.fcb):00144 fcb %00000000 ( 8x8.fcb):00145 ( 8x8.fcb):00146 ; '"' 0172 00 ( 8x8.fcb):00147 fcb %00000000 0173 66 ( 8x8.fcb):00148 fcb %01100110 0174 66 ( 8x8.fcb):00149 fcb %01100110 0175 00 ( 8x8.fcb):00150 fcb %00000000 0176 00 ( 8x8.fcb):00151 fcb %00000000 0177 00 ( 8x8.fcb):00152 fcb %00000000 0178 00 ( 8x8.fcb):00153 fcb %00000000 0179 00 ( 8x8.fcb):00154 fcb %00000000 ( 8x8.fcb):00155 ( 8x8.fcb):00156 ; '#' 017A 00 ( 8x8.fcb):00157 fcb %00000000 017B 66 ( 8x8.fcb):00158 fcb %01100110 017C FF ( 8x8.fcb):00159 fcb %11111111 017D 66 ( 8x8.fcb):00160 fcb %01100110 017E FF ( 8x8.fcb):00161 fcb %11111111 017F 66 ( 8x8.fcb):00162 fcb %01100110 0180 00 ( 8x8.fcb):00163 fcb %00000000 0181 00 ( 8x8.fcb):00164 fcb %00000000 ( 8x8.fcb):00165 ( 8x8.fcb):00166 ; '$' 0182 00 ( 8x8.fcb):00167 fcb %00000000 0183 18 ( 8x8.fcb):00168 fcb %00011000 0184 3E ( 8x8.fcb):00169 fcb %00111110 0185 78 ( 8x8.fcb):00170 fcb %01111000 0186 1E ( 8x8.fcb):00171 fcb %00011110 0187 7C ( 8x8.fcb):00172 fcb %01111100 0188 18 ( 8x8.fcb):00173 fcb %00011000 0189 00 ( 8x8.fcb):00174 fcb %00000000 ( 8x8.fcb):00175 ( 8x8.fcb):00176 ; '%' 018A 00 ( 8x8.fcb):00177 fcb %00000000 018B 66 ( 8x8.fcb):00178 fcb %01100110 018C 0C ( 8x8.fcb):00179 fcb %00001100 018D 18 ( 8x8.fcb):00180 fcb %00011000 018E 30 ( 8x8.fcb):00181 fcb %00110000 018F 66 ( 8x8.fcb):00182 fcb %01100110 0190 00 ( 8x8.fcb):00183 fcb %00000000 0191 00 ( 8x8.fcb):00184 fcb %00000000 ( 8x8.fcb):00185 ( 8x8.fcb):00186 ; '&' 0192 00 ( 8x8.fcb):00187 fcb %00000000 0193 3C ( 8x8.fcb):00188 fcb %00111100 0194 66 ( 8x8.fcb):00189 fcb %01100110 0195 38 ( 8x8.fcb):00190 fcb %00111000 0196 67 ( 8x8.fcb):00191 fcb %01100111 0197 3E ( 8x8.fcb):00192 fcb %00111110 0198 00 ( 8x8.fcb):00193 fcb %00000000 0199 00 ( 8x8.fcb):00194 fcb %00000000 ( 8x8.fcb):00195 ( 8x8.fcb):00196 ; ''' 019A 00 ( 8x8.fcb):00197 fcb %00000000 019B 0C ( 8x8.fcb):00198 fcb %00001100 019C 0C ( 8x8.fcb):00199 fcb %00001100 019D 18 ( 8x8.fcb):00200 fcb %00011000 019E 00 ( 8x8.fcb):00201 fcb %00000000 019F 00 ( 8x8.fcb):00202 fcb %00000000 01A0 00 ( 8x8.fcb):00203 fcb %00000000 01A1 00 ( 8x8.fcb):00204 fcb %00000000 ( 8x8.fcb):00205 ( 8x8.fcb):00206 ; '(' 01A2 00 ( 8x8.fcb):00207 fcb %00000000 01A3 0C ( 8x8.fcb):00208 fcb %00001100 01A4 18 ( 8x8.fcb):00209 fcb %00011000 01A5 30 ( 8x8.fcb):00210 fcb %00110000 01A6 30 ( 8x8.fcb):00211 fcb %00110000 01A7 18 ( 8x8.fcb):00212 fcb %00011000 01A8 0C ( 8x8.fcb):00213 fcb %00001100 01A9 00 ( 8x8.fcb):00214 fcb %00000000 ( 8x8.fcb):00215 ( 8x8.fcb):00216 ; ')' 01AA 00 ( 8x8.fcb):00217 fcb %00000000 01AB 30 ( 8x8.fcb):00218 fcb %00110000 01AC 18 ( 8x8.fcb):00219 fcb %00011000 01AD 0C ( 8x8.fcb):00220 fcb %00001100 01AE 0C ( 8x8.fcb):00221 fcb %00001100 01AF 18 ( 8x8.fcb):00222 fcb %00011000 01B0 30 ( 8x8.fcb):00223 fcb %00110000 01B1 00 ( 8x8.fcb):00224 fcb %00000000 ( 8x8.fcb):00225 ( 8x8.fcb):00226 ; '*' 01B2 00 ( 8x8.fcb):00227 fcb %00000000 01B3 66 ( 8x8.fcb):00228 fcb %01100110 01B4 3C ( 8x8.fcb):00229 fcb %00111100 01B5 FF ( 8x8.fcb):00230 fcb %11111111 01B6 3C ( 8x8.fcb):00231 fcb %00111100 01B7 66 ( 8x8.fcb):00232 fcb %01100110 01B8 00 ( 8x8.fcb):00233 fcb %00000000 01B9 00 ( 8x8.fcb):00234 fcb %00000000 ( 8x8.fcb):00235 ( 8x8.fcb):00236 ; '+' 01BA 00 ( 8x8.fcb):00237 fcb %00000000 01BB 18 ( 8x8.fcb):00238 fcb %00011000 01BC 18 ( 8x8.fcb):00239 fcb %00011000 01BD 7E ( 8x8.fcb):00240 fcb %01111110 01BE 18 ( 8x8.fcb):00241 fcb %00011000 01BF 18 ( 8x8.fcb):00242 fcb %00011000 01C0 00 ( 8x8.fcb):00243 fcb %00000000 01C1 00 ( 8x8.fcb):00244 fcb %00000000 ( 8x8.fcb):00245 ( 8x8.fcb):00246 ; ',' 01C2 00 ( 8x8.fcb):00247 fcb %00000000 01C3 00 ( 8x8.fcb):00248 fcb %00000000 01C4 00 ( 8x8.fcb):00249 fcb %00000000 01C5 00 ( 8x8.fcb):00250 fcb %00000000 01C6 38 ( 8x8.fcb):00251 fcb %00111000 01C7 30 ( 8x8.fcb):00252 fcb %00110000 01C8 60 ( 8x8.fcb):00253 fcb %01100000 01C9 00 ( 8x8.fcb):00254 fcb %00000000 ( 8x8.fcb):00255 ( 8x8.fcb):00256 ; '-' 01CA 00 ( 8x8.fcb):00257 fcb %00000000 01CB 00 ( 8x8.fcb):00258 fcb %00000000 01CC 00 ( 8x8.fcb):00259 fcb %00000000 01CD 7E ( 8x8.fcb):00260 fcb %01111110 01CE 00 ( 8x8.fcb):00261 fcb %00000000 01CF 00 ( 8x8.fcb):00262 fcb %00000000 01D0 00 ( 8x8.fcb):00263 fcb %00000000 01D1 00 ( 8x8.fcb):00264 fcb %00000000 ( 8x8.fcb):00265 ( 8x8.fcb):00266 ; '.' 01D2 00 ( 8x8.fcb):00267 fcb %00000000 01D3 00 ( 8x8.fcb):00268 fcb %00000000 01D4 00 ( 8x8.fcb):00269 fcb %00000000 01D5 00 ( 8x8.fcb):00270 fcb %00000000 01D6 60 ( 8x8.fcb):00271 fcb %01100000 01D7 60 ( 8x8.fcb):00272 fcb %01100000 01D8 00 ( 8x8.fcb):00273 fcb %00000000 01D9 00 ( 8x8.fcb):00274 fcb %00000000 ( 8x8.fcb):00275 ( 8x8.fcb):00276 ; '/' 01DA 00 ( 8x8.fcb):00277 fcb %00000000 01DB 03 ( 8x8.fcb):00278 fcb %00000011 01DC 06 ( 8x8.fcb):00279 fcb %00000110 01DD 0C ( 8x8.fcb):00280 fcb %00001100 01DE 18 ( 8x8.fcb):00281 fcb %00011000 01DF 30 ( 8x8.fcb):00282 fcb %00110000 01E0 00 ( 8x8.fcb):00283 fcb %00000000 01E1 00 ( 8x8.fcb):00284 fcb %00000000 ( 8x8.fcb):00285 ( 8x8.fcb):00286 ; '0' 01E2 00 ( 8x8.fcb):00287 fcb %00000000 01E3 3E ( 8x8.fcb):00288 fcb %00111110 01E4 67 ( 8x8.fcb):00289 fcb %01100111 01E5 6B ( 8x8.fcb):00290 fcb %01101011 01E6 73 ( 8x8.fcb):00291 fcb %01110011 01E7 3E ( 8x8.fcb):00292 fcb %00111110 01E8 00 ( 8x8.fcb):00293 fcb %00000000 01E9 00 ( 8x8.fcb):00294 fcb %00000000 ( 8x8.fcb):00295 ( 8x8.fcb):00296 ; '1' 01EA 00 ( 8x8.fcb):00297 fcb %00000000 01EB 18 ( 8x8.fcb):00298 fcb %00011000 01EC 38 ( 8x8.fcb):00299 fcb %00111000 01ED 18 ( 8x8.fcb):00300 fcb %00011000 01EE 18 ( 8x8.fcb):00301 fcb %00011000 01EF 7E ( 8x8.fcb):00302 fcb %01111110 01F0 00 ( 8x8.fcb):00303 fcb %00000000 01F1 00 ( 8x8.fcb):00304 fcb %00000000 ( 8x8.fcb):00305 ( 8x8.fcb):00306 ; '2' 01F2 00 ( 8x8.fcb):00307 fcb %00000000 01F3 38 ( 8x8.fcb):00308 fcb %00111000 01F4 4C ( 8x8.fcb):00309 fcb %01001100 01F5 18 ( 8x8.fcb):00310 fcb %00011000 01F6 30 ( 8x8.fcb):00311 fcb %00110000 01F7 7C ( 8x8.fcb):00312 fcb %01111100 01F8 00 ( 8x8.fcb):00313 fcb %00000000 01F9 00 ( 8x8.fcb):00314 fcb %00000000 ( 8x8.fcb):00315 ( 8x8.fcb):00316 ; '3' 01FA 00 ( 8x8.fcb):00317 fcb %00000000 01FB 3C ( 8x8.fcb):00318 fcb %00111100 01FC 06 ( 8x8.fcb):00319 fcb %00000110 01FD 1C ( 8x8.fcb):00320 fcb %00011100 01FE 06 ( 8x8.fcb):00321 fcb %00000110 01FF 3C ( 8x8.fcb):00322 fcb %00111100 0200 00 ( 8x8.fcb):00323 fcb %00000000 0201 00 ( 8x8.fcb):00324 fcb %00000000 ( 8x8.fcb):00325 ( 8x8.fcb):00326 ; '4' ( 8x8.fcb):00327 0202 00 ( 8x8.fcb):00328 fcb %00000000 0203 36 ( 8x8.fcb):00329 fcb %00110110 0204 36 ( 8x8.fcb):00330 fcb %00110110 0205 3E ( 8x8.fcb):00331 fcb %00111110 0206 06 ( 8x8.fcb):00332 fcb %00000110 0207 06 ( 8x8.fcb):00333 fcb %00000110 0208 00 ( 8x8.fcb):00334 fcb %00000000 0209 00 ( 8x8.fcb):00335 fcb %00000000 ( 8x8.fcb):00336 ( 8x8.fcb):00337 ; '5' 020A 00 ( 8x8.fcb):00338 fcb %00000000 020B 7E ( 8x8.fcb):00339 fcb %01111110 020C 60 ( 8x8.fcb):00340 fcb %01100000 020D 7C ( 8x8.fcb):00341 fcb %01111100 020E 06 ( 8x8.fcb):00342 fcb %00000110 020F 7C ( 8x8.fcb):00343 fcb %01111100 0210 00 ( 8x8.fcb):00344 fcb %00000000 0211 00 ( 8x8.fcb):00345 fcb %00000000 ( 8x8.fcb):00346 ( 8x8.fcb):00347 ; '6' 0212 00 ( 8x8.fcb):00348 fcb %00000000 0213 3C ( 8x8.fcb):00349 fcb %00111100 0214 60 ( 8x8.fcb):00350 fcb %01100000 0215 7C ( 8x8.fcb):00351 fcb %01111100 0216 66 ( 8x8.fcb):00352 fcb %01100110 0217 3C ( 8x8.fcb):00353 fcb %00111100 0218 00 ( 8x8.fcb):00354 fcb %00000000 0219 00 ( 8x8.fcb):00355 fcb %00000000 ( 8x8.fcb):00356 ( 8x8.fcb):00357 ; '7' 021A 00 ( 8x8.fcb):00358 fcb %00000000 021B 7E ( 8x8.fcb):00359 fcb %01111110 021C 66 ( 8x8.fcb):00360 fcb %01100110 021D 0C ( 8x8.fcb):00361 fcb %00001100 021E 18 ( 8x8.fcb):00362 fcb %00011000 021F 18 ( 8x8.fcb):00363 fcb %00011000 0220 00 ( 8x8.fcb):00364 fcb %00000000 0221 00 ( 8x8.fcb):00365 fcb %00000000 ( 8x8.fcb):00366 ( 8x8.fcb):00367 ; '8' 0222 00 ( 8x8.fcb):00368 fcb %00000000 0223 3C ( 8x8.fcb):00369 fcb %00111100 0224 66 ( 8x8.fcb):00370 fcb %01100110 0225 3C ( 8x8.fcb):00371 fcb %00111100 0226 66 ( 8x8.fcb):00372 fcb %01100110 0227 3C ( 8x8.fcb):00373 fcb %00111100 0228 00 ( 8x8.fcb):00374 fcb %00000000 0229 00 ( 8x8.fcb):00375 fcb %00000000 ( 8x8.fcb):00376 ( 8x8.fcb):00377 ; '9' 022A 00 ( 8x8.fcb):00378 fcb %00000000 022B 3C ( 8x8.fcb):00379 fcb %00111100 022C 66 ( 8x8.fcb):00380 fcb %01100110 022D 3E ( 8x8.fcb):00381 fcb %00111110 022E 06 ( 8x8.fcb):00382 fcb %00000110 022F 3C ( 8x8.fcb):00383 fcb %00111100 0230 00 ( 8x8.fcb):00384 fcb %00000000 0231 00 ( 8x8.fcb):00385 fcb %00000000 ( 8x8.fcb):00386 ( 8x8.fcb):00387 ; ':' 0232 00 ( 8x8.fcb):00388 fcb %00000000 0233 00 ( 8x8.fcb):00389 fcb %00000000 0234 18 ( 8x8.fcb):00390 fcb %00011000 0235 00 ( 8x8.fcb):00391 fcb %00000000 0236 18 ( 8x8.fcb):00392 fcb %00011000 0237 00 ( 8x8.fcb):00393 fcb %00000000 0238 00 ( 8x8.fcb):00394 fcb %00000000 0239 00 ( 8x8.fcb):00395 fcb %00000000 ( 8x8.fcb):00396 ( 8x8.fcb):00397 ; ';' 023A 00 ( 8x8.fcb):00398 fcb %00000000 023B 00 ( 8x8.fcb):00399 fcb %00000000 023C 18 ( 8x8.fcb):00400 fcb %00011000 023D 00 ( 8x8.fcb):00401 fcb %00000000 023E 18 ( 8x8.fcb):00402 fcb %00011000 023F 18 ( 8x8.fcb):00403 fcb %00011000 0240 30 ( 8x8.fcb):00404 fcb %00110000 0241 00 ( 8x8.fcb):00405 fcb %00000000 ( 8x8.fcb):00406 ( 8x8.fcb):00407 ; '<' 0242 00 ( 8x8.fcb):00408 fcb %00000000 0243 0C ( 8x8.fcb):00409 fcb %00001100 0244 18 ( 8x8.fcb):00410 fcb %00011000 0245 30 ( 8x8.fcb):00411 fcb %00110000 0246 18 ( 8x8.fcb):00412 fcb %00011000 0247 0C ( 8x8.fcb):00413 fcb %00001100 0248 00 ( 8x8.fcb):00414 fcb %00000000 0249 00 ( 8x8.fcb):00415 fcb %00000000 ( 8x8.fcb):00416 ( 8x8.fcb):00417 ; '=' 024A 00 ( 8x8.fcb):00418 fcb %00000000 024B 00 ( 8x8.fcb):00419 fcb %00000000 024C 7E ( 8x8.fcb):00420 fcb %01111110 024D 00 ( 8x8.fcb):00421 fcb %00000000 024E 7E ( 8x8.fcb):00422 fcb %01111110 024F 00 ( 8x8.fcb):00423 fcb %00000000 0250 00 ( 8x8.fcb):00424 fcb %00000000 0251 00 ( 8x8.fcb):00425 fcb %00000000 ( 8x8.fcb):00426 ( 8x8.fcb):00427 ; '>' 0252 00 ( 8x8.fcb):00428 fcb %00000000 0253 30 ( 8x8.fcb):00429 fcb %00110000 0254 18 ( 8x8.fcb):00430 fcb %00011000 0255 0C ( 8x8.fcb):00431 fcb %00001100 0256 18 ( 8x8.fcb):00432 fcb %00011000 0257 30 ( 8x8.fcb):00433 fcb %00110000 0258 00 ( 8x8.fcb):00434 fcb %00000000 0259 00 ( 8x8.fcb):00435 fcb %00000000 ( 8x8.fcb):00436 ( 8x8.fcb):00437 ; '?' 025A 00 ( 8x8.fcb):00438 fcb %00000000 025B 3C ( 8x8.fcb):00439 fcb %00111100 025C 06 ( 8x8.fcb):00440 fcb %00000110 025D 1C ( 8x8.fcb):00441 fcb %00011100 025E 00 ( 8x8.fcb):00442 fcb %00000000 025F 18 ( 8x8.fcb):00443 fcb %00011000 0260 00 ( 8x8.fcb):00444 fcb %00000000 0261 00 ( 8x8.fcb):00445 fcb %00000000 ( 8x8.fcb):00446 ( 8x8.fcb):00447 ; '@' 0262 00 ( 8x8.fcb):00448 fcb %00000000 0263 3C ( 8x8.fcb):00449 fcb %00111100 0264 66 ( 8x8.fcb):00450 fcb %01100110 0265 6E ( 8x8.fcb):00451 fcb %01101110 0266 60 ( 8x8.fcb):00452 fcb %01100000 0267 3C ( 8x8.fcb):00453 fcb %00111100 0268 00 ( 8x8.fcb):00454 fcb %00000000 0269 00 ( 8x8.fcb):00455 fcb %00000000 ( 8x8.fcb):00456 ( 8x8.fcb):00457 ; 'A' 026A 00 ( 8x8.fcb):00458 fcb %00000000 026B 3C ( 8x8.fcb):00459 fcb %00111100 026C 66 ( 8x8.fcb):00460 fcb %01100110 026D 7E ( 8x8.fcb):00461 fcb %01111110 026E 66 ( 8x8.fcb):00462 fcb %01100110 026F 66 ( 8x8.fcb):00463 fcb %01100110 0270 00 ( 8x8.fcb):00464 fcb %00000000 0271 00 ( 8x8.fcb):00465 fcb %00000000 ( 8x8.fcb):00466 ( 8x8.fcb):00467 ; 'B' 0272 00 ( 8x8.fcb):00468 fcb %00000000 0273 7C ( 8x8.fcb):00469 fcb %01111100 0274 66 ( 8x8.fcb):00470 fcb %01100110 0275 7C ( 8x8.fcb):00471 fcb %01111100 0276 66 ( 8x8.fcb):00472 fcb %01100110 0277 7C ( 8x8.fcb):00473 fcb %01111100 0278 00 ( 8x8.fcb):00474 fcb %00000000 0279 00 ( 8x8.fcb):00475 fcb %00000000 ( 8x8.fcb):00476 ( 8x8.fcb):00477 ; 'C' 027A 00 ( 8x8.fcb):00478 fcb %00000000 027B 3C ( 8x8.fcb):00479 fcb %00111100 027C 66 ( 8x8.fcb):00480 fcb %01100110 027D 60 ( 8x8.fcb):00481 fcb %01100000 027E 66 ( 8x8.fcb):00482 fcb %01100110 027F 3C ( 8x8.fcb):00483 fcb %00111100 0280 00 ( 8x8.fcb):00484 fcb %00000000 0281 00 ( 8x8.fcb):00485 fcb %00000000 ( 8x8.fcb):00486 ( 8x8.fcb):00487 ; 'D' 0282 00 ( 8x8.fcb):00488 fcb %00000000 0283 78 ( 8x8.fcb):00489 fcb %01111000 0284 6C ( 8x8.fcb):00490 fcb %01101100 0285 66 ( 8x8.fcb):00491 fcb %01100110 0286 6C ( 8x8.fcb):00492 fcb %01101100 0287 78 ( 8x8.fcb):00493 fcb %01111000 0288 00 ( 8x8.fcb):00494 fcb %00000000 0289 00 ( 8x8.fcb):00495 fcb %00000000 ( 8x8.fcb):00496 ( 8x8.fcb):00497 ; 'E' 028A 00 ( 8x8.fcb):00498 fcb %00000000 028B 7E ( 8x8.fcb):00499 fcb %01111110 028C 60 ( 8x8.fcb):00500 fcb %01100000 028D 78 ( 8x8.fcb):00501 fcb %01111000 028E 60 ( 8x8.fcb):00502 fcb %01100000 028F 7E ( 8x8.fcb):00503 fcb %01111110 0290 00 ( 8x8.fcb):00504 fcb %00000000 0291 00 ( 8x8.fcb):00505 fcb %00000000 ( 8x8.fcb):00506 ( 8x8.fcb):00507 ; 'F' 0292 00 ( 8x8.fcb):00508 fcb %00000000 0293 7E ( 8x8.fcb):00509 fcb %01111110 0294 60 ( 8x8.fcb):00510 fcb %01100000 0295 78 ( 8x8.fcb):00511 fcb %01111000 0296 60 ( 8x8.fcb):00512 fcb %01100000 0297 60 ( 8x8.fcb):00513 fcb %01100000 0298 00 ( 8x8.fcb):00514 fcb %00000000 0299 00 ( 8x8.fcb):00515 fcb %00000000 ( 8x8.fcb):00516 ( 8x8.fcb):00517 ; 'G' 029A 00 ( 8x8.fcb):00518 fcb %00000000 029B 3C ( 8x8.fcb):00519 fcb %00111100 029C 60 ( 8x8.fcb):00520 fcb %01100000 029D 6E ( 8x8.fcb):00521 fcb %01101110 029E 66 ( 8x8.fcb):00522 fcb %01100110 029F 3C ( 8x8.fcb):00523 fcb %00111100 02A0 00 ( 8x8.fcb):00524 fcb %00000000 02A1 00 ( 8x8.fcb):00525 fcb %00000000 ( 8x8.fcb):00526 ( 8x8.fcb):00527 ; 'H' 02A2 00 ( 8x8.fcb):00528 fcb %00000000 02A3 66 ( 8x8.fcb):00529 fcb %01100110 02A4 66 ( 8x8.fcb):00530 fcb %01100110 02A5 7E ( 8x8.fcb):00531 fcb %01111110 02A6 66 ( 8x8.fcb):00532 fcb %01100110 02A7 66 ( 8x8.fcb):00533 fcb %01100110 02A8 00 ( 8x8.fcb):00534 fcb %00000000 02A9 00 ( 8x8.fcb):00535 fcb %00000000 ( 8x8.fcb):00536 ( 8x8.fcb):00537 ; 'I' 02AA 00 ( 8x8.fcb):00538 fcb %00000000 02AB 3C ( 8x8.fcb):00539 fcb %00111100 02AC 18 ( 8x8.fcb):00540 fcb %00011000 02AD 18 ( 8x8.fcb):00541 fcb %00011000 02AE 18 ( 8x8.fcb):00542 fcb %00011000 02AF 3C ( 8x8.fcb):00543 fcb %00111100 02B0 00 ( 8x8.fcb):00544 fcb %00000000 02B1 00 ( 8x8.fcb):00545 fcb %00000000 ( 8x8.fcb):00546 ( 8x8.fcb):00547 ; 'J' 02B2 00 ( 8x8.fcb):00548 fcb %00000000 02B3 1E ( 8x8.fcb):00549 fcb %00011110 02B4 0C ( 8x8.fcb):00550 fcb %00001100 02B5 0C ( 8x8.fcb):00551 fcb %00001100 02B6 6C ( 8x8.fcb):00552 fcb %01101100 02B7 38 ( 8x8.fcb):00553 fcb %00111000 02B8 00 ( 8x8.fcb):00554 fcb %00000000 02B9 00 ( 8x8.fcb):00555 fcb %00000000 ( 8x8.fcb):00556 ( 8x8.fcb):00557 ; 'K' 02BA 00 ( 8x8.fcb):00558 fcb %00000000 02BB 66 ( 8x8.fcb):00559 fcb %01100110 02BC 6C ( 8x8.fcb):00560 fcb %01101100 02BD 78 ( 8x8.fcb):00561 fcb %01111000 02BE 6C ( 8x8.fcb):00562 fcb %01101100 02BF 66 ( 8x8.fcb):00563 fcb %01100110 02C0 00 ( 8x8.fcb):00564 fcb %00000000 02C1 00 ( 8x8.fcb):00565 fcb %00000000 ( 8x8.fcb):00566 ( 8x8.fcb):00567 ; 'L' 02C2 00 ( 8x8.fcb):00568 fcb %00000000 02C3 60 ( 8x8.fcb):00569 fcb %01100000 02C4 60 ( 8x8.fcb):00570 fcb %01100000 02C5 60 ( 8x8.fcb):00571 fcb %01100000 02C6 60 ( 8x8.fcb):00572 fcb %01100000 02C7 7E ( 8x8.fcb):00573 fcb %01111110 02C8 00 ( 8x8.fcb):00574 fcb %00000000 02C9 00 ( 8x8.fcb):00575 fcb %00000000 ( 8x8.fcb):00576 ( 8x8.fcb):00577 ; 'M' 02CA 00 ( 8x8.fcb):00578 fcb %00000000 02CB 63 ( 8x8.fcb):00579 fcb %01100011 02CC 77 ( 8x8.fcb):00580 fcb %01110111 02CD 7F ( 8x8.fcb):00581 fcb %01111111 02CE 6B ( 8x8.fcb):00582 fcb %01101011 02CF 63 ( 8x8.fcb):00583 fcb %01100011 02D0 00 ( 8x8.fcb):00584 fcb %00000000 02D1 00 ( 8x8.fcb):00585 fcb %00000000 ( 8x8.fcb):00586 ( 8x8.fcb):00587 ; 'N' 02D2 00 ( 8x8.fcb):00588 fcb %00000000 02D3 66 ( 8x8.fcb):00589 fcb %01100110 02D4 76 ( 8x8.fcb):00590 fcb %01110110 02D5 7E ( 8x8.fcb):00591 fcb %01111110 02D6 6E ( 8x8.fcb):00592 fcb %01101110 02D7 66 ( 8x8.fcb):00593 fcb %01100110 02D8 00 ( 8x8.fcb):00594 fcb %00000000 02D9 00 ( 8x8.fcb):00595 fcb %00000000 ( 8x8.fcb):00596 ( 8x8.fcb):00597 ; 'O' 02DA 00 ( 8x8.fcb):00598 fcb %00000000 02DB 3C ( 8x8.fcb):00599 fcb %00111100 02DC 66 ( 8x8.fcb):00600 fcb %01100110 02DD 66 ( 8x8.fcb):00601 fcb %01100110 02DE 66 ( 8x8.fcb):00602 fcb %01100110 02DF 3C ( 8x8.fcb):00603 fcb %00111100 02E0 00 ( 8x8.fcb):00604 fcb %00000000 02E1 00 ( 8x8.fcb):00605 fcb %00000000 ( 8x8.fcb):00606 ( 8x8.fcb):00607 ; 'P' 02E2 00 ( 8x8.fcb):00608 fcb %00000000 02E3 7C ( 8x8.fcb):00609 fcb %01111100 02E4 66 ( 8x8.fcb):00610 fcb %01100110 02E5 7C ( 8x8.fcb):00611 fcb %01111100 02E6 60 ( 8x8.fcb):00612 fcb %01100000 02E7 60 ( 8x8.fcb):00613 fcb %01100000 02E8 00 ( 8x8.fcb):00614 fcb %00000000 02E9 00 ( 8x8.fcb):00615 fcb %00000000 ( 8x8.fcb):00616 ( 8x8.fcb):00617 ; 'Q' 02EA 00 ( 8x8.fcb):00618 fcb %00000000 02EB 3C ( 8x8.fcb):00619 fcb %00111100 02EC 66 ( 8x8.fcb):00620 fcb %01100110 02ED 66 ( 8x8.fcb):00621 fcb %01100110 02EE 6C ( 8x8.fcb):00622 fcb %01101100 02EF 3E ( 8x8.fcb):00623 fcb %00111110 02F0 00 ( 8x8.fcb):00624 fcb %00000000 02F1 00 ( 8x8.fcb):00625 fcb %00000000 ( 8x8.fcb):00626 ( 8x8.fcb):00627 ; 'R' 02F2 00 ( 8x8.fcb):00628 fcb %00000000 02F3 7C ( 8x8.fcb):00629 fcb %01111100 02F4 66 ( 8x8.fcb):00630 fcb %01100110 02F5 7C ( 8x8.fcb):00631 fcb %01111100 02F6 6C ( 8x8.fcb):00632 fcb %01101100 02F7 66 ( 8x8.fcb):00633 fcb %01100110 02F8 00 ( 8x8.fcb):00634 fcb %00000000 02F9 00 ( 8x8.fcb):00635 fcb %00000000 ( 8x8.fcb):00636 ( 8x8.fcb):00637 ; 's' 02FA 00 ( 8x8.fcb):00638 fcb %00000000 02FB 1E ( 8x8.fcb):00639 fcb %00011110 02FC 30 ( 8x8.fcb):00640 fcb %00110000 02FD 1C ( 8x8.fcb):00641 fcb %00011100 02FE 06 ( 8x8.fcb):00642 fcb %00000110 02FF 3C ( 8x8.fcb):00643 fcb %00111100 0300 00 ( 8x8.fcb):00644 fcb %00000000 0301 00 ( 8x8.fcb):00645 fcb %00000000 ( 8x8.fcb):00646 ( 8x8.fcb):00647 ; 'T' 0302 00 ( 8x8.fcb):00648 fcb %00000000 0303 7E ( 8x8.fcb):00649 fcb %01111110 0304 18 ( 8x8.fcb):00650 fcb %00011000 0305 18 ( 8x8.fcb):00651 fcb %00011000 0306 18 ( 8x8.fcb):00652 fcb %00011000 0307 18 ( 8x8.fcb):00653 fcb %00011000 0308 00 ( 8x8.fcb):00654 fcb %00000000 0309 00 ( 8x8.fcb):00655 fcb %00000000 ( 8x8.fcb):00656 ( 8x8.fcb):00657 ; 'U' 030A 00 ( 8x8.fcb):00658 fcb %00000000 030B 66 ( 8x8.fcb):00659 fcb %01100110 030C 66 ( 8x8.fcb):00660 fcb %01100110 030D 66 ( 8x8.fcb):00661 fcb %01100110 030E 66 ( 8x8.fcb):00662 fcb %01100110 030F 3C ( 8x8.fcb):00663 fcb %00111100 0310 00 ( 8x8.fcb):00664 fcb %00000000 0311 00 ( 8x8.fcb):00665 fcb %00000000 ( 8x8.fcb):00666 ( 8x8.fcb):00667 ; 'V' 0312 00 ( 8x8.fcb):00668 fcb %00000000 0313 66 ( 8x8.fcb):00669 fcb %01100110 0314 66 ( 8x8.fcb):00670 fcb %01100110 0315 66 ( 8x8.fcb):00671 fcb %01100110 0316 3C ( 8x8.fcb):00672 fcb %00111100 0317 18 ( 8x8.fcb):00673 fcb %00011000 0318 00 ( 8x8.fcb):00674 fcb %00000000 0319 00 ( 8x8.fcb):00675 fcb %00000000 ( 8x8.fcb):00676 ( 8x8.fcb):00677 ; 'W' 031A 00 ( 8x8.fcb):00678 fcb %00000000 031B 63 ( 8x8.fcb):00679 fcb %01100011 031C 6B ( 8x8.fcb):00680 fcb %01101011 031D 7F ( 8x8.fcb):00681 fcb %01111111 031E 77 ( 8x8.fcb):00682 fcb %01110111 031F 63 ( 8x8.fcb):00683 fcb %01100011 0320 00 ( 8x8.fcb):00684 fcb %00000000 0321 00 ( 8x8.fcb):00685 fcb %00000000 ( 8x8.fcb):00686 ( 8x8.fcb):00687 ; 'X' 0322 00 ( 8x8.fcb):00688 fcb %00000000 0323 66 ( 8x8.fcb):00689 fcb %01100110 0324 66 ( 8x8.fcb):00690 fcb %01100110 0325 3C ( 8x8.fcb):00691 fcb %00111100 0326 66 ( 8x8.fcb):00692 fcb %01100110 0327 66 ( 8x8.fcb):00693 fcb %01100110 0328 00 ( 8x8.fcb):00694 fcb %00000000 0329 00 ( 8x8.fcb):00695 fcb %00000000 ( 8x8.fcb):00696 ( 8x8.fcb):00697 ; 'Y' 032A 00 ( 8x8.fcb):00698 fcb %00000000 032B 66 ( 8x8.fcb):00699 fcb %01100110 032C 3C ( 8x8.fcb):00700 fcb %00111100 032D 18 ( 8x8.fcb):00701 fcb %00011000 032E 18 ( 8x8.fcb):00702 fcb %00011000 032F 18 ( 8x8.fcb):00703 fcb %00011000 0330 00 ( 8x8.fcb):00704 fcb %00000000 0331 00 ( 8x8.fcb):00705 fcb %00000000 ( 8x8.fcb):00706 ( 8x8.fcb):00707 ; 'Z' 0332 00 ( 8x8.fcb):00708 fcb %00000000 0333 7F ( 8x8.fcb):00709 fcb %01111111 0334 07 ( 8x8.fcb):00710 fcb %00000111 0335 1C ( 8x8.fcb):00711 fcb %00011100 0336 38 ( 8x8.fcb):00712 fcb %0111000 0337 7F ( 8x8.fcb):00713 fcb %01111111 0338 00 ( 8x8.fcb):00714 fcb %00000000 0339 00 ( 8x8.fcb):00715 fcb %00000000 ( 8x8.fcb):00716 ( 8x8.fcb):00717 ; '[' 033A 00 ( 8x8.fcb):00718 fcb %00000000 033B 3C ( 8x8.fcb):00719 fcb %00111100 033C 30 ( 8x8.fcb):00720 fcb %00110000 033D 30 ( 8x8.fcb):00721 fcb %00110000 033E 30 ( 8x8.fcb):00722 fcb %00110000 033F 3C ( 8x8.fcb):00723 fcb %00111100 0340 00 ( 8x8.fcb):00724 fcb %00000000 0341 00 ( 8x8.fcb):00725 fcb %00000000 ( 8x8.fcb):00726 ( 8x8.fcb):00727 ; '\' 0342 00 ( 8x8.fcb):00728 fcb %00000000 0343 30 ( 8x8.fcb):00729 fcb %00110000 0344 18 ( 8x8.fcb):00730 fcb %00011000 0345 0C ( 8x8.fcb):00731 fcb %00001100 0346 06 ( 8x8.fcb):00732 fcb %00000110 0347 03 ( 8x8.fcb):00733 fcb %00000011 0348 00 ( 8x8.fcb):00734 fcb %00000000 0349 00 ( 8x8.fcb):00735 fcb %00000000 ( 8x8.fcb):00736 ( 8x8.fcb):00737 ; ']' 034A 00 ( 8x8.fcb):00738 fcb %00000000 034B 3C ( 8x8.fcb):00739 fcb %00111100 034C 0C ( 8x8.fcb):00740 fcb %00001100 034D 0C ( 8x8.fcb):00741 fcb %00001100 034E 0C ( 8x8.fcb):00742 fcb %00001100 034F 3C ( 8x8.fcb):00743 fcb %00111100 0350 00 ( 8x8.fcb):00744 fcb %00000000 0351 00 ( 8x8.fcb):00745 fcb %00000000 ( 8x8.fcb):00746 ( 8x8.fcb):00747 ; '^' 0352 00 ( 8x8.fcb):00748 fcb %00000000 0353 18 ( 8x8.fcb):00749 fcb %00011000 0354 3C ( 8x8.fcb):00750 fcb %00111100 0355 66 ( 8x8.fcb):00751 fcb %01100110 0356 00 ( 8x8.fcb):00752 fcb %00000000 0357 00 ( 8x8.fcb):00753 fcb %00000000 0358 00 ( 8x8.fcb):00754 fcb %00000000 0359 00 ( 8x8.fcb):00755 fcb %00000000 ( 8x8.fcb):00756 ( 8x8.fcb):00757 ; '0' 035A 00 ( 8x8.fcb):00758 fcb %00000000 035B 00 ( 8x8.fcb):00759 fcb %00000000 035C 00 ( 8x8.fcb):00760 fcb %00000000 035D 00 ( 8x8.fcb):00761 fcb %00000000 035E 00 ( 8x8.fcb):00762 fcb %00000000 035F FF ( 8x8.fcb):00763 fcb %11111111 0360 00 ( 8x8.fcb):00764 fcb %00000000 0361 00 ( 8x8.fcb):00765 fcb %00000000 ( 8x8.fcb):00766 ( 8x8.fcb):00767 ; '`' 0362 60 ( 8x8.fcb):00768 fcb %01100000 0363 30 ( 8x8.fcb):00769 fcb %00110000 0364 18 ( 8x8.fcb):00770 fcb %00011000 0365 00 ( 8x8.fcb):00771 fcb %00000000 0366 00 ( 8x8.fcb):00772 fcb %00000000 0367 00 ( 8x8.fcb):00773 fcb %00000000 0368 00 ( 8x8.fcb):00774 fcb %00000000 0369 00 ( 8x8.fcb):00775 fcb %00000000 ( 8x8.fcb):00776 ( 8x8.fcb):00777 ; 'a' 036A 00 ( 8x8.fcb):00778 fcb %00000000 036B 00 ( 8x8.fcb):00779 fcb %00000000 036C 3C ( 8x8.fcb):00780 fcb %00111100 036D 66 ( 8x8.fcb):00781 fcb %01100110 036E 66 ( 8x8.fcb):00782 fcb %01100110 036F 3F ( 8x8.fcb):00783 fcb %00111111 0370 00 ( 8x8.fcb):00784 fcb %00000000 0371 00 ( 8x8.fcb):00785 fcb %00000000 ( 8x8.fcb):00786 ( 8x8.fcb):00787 ; 'b' 0372 00 ( 8x8.fcb):00788 fcb %00000000 0373 60 ( 8x8.fcb):00789 fcb %01100000 0374 7C ( 8x8.fcb):00790 fcb %01111100 0375 66 ( 8x8.fcb):00791 fcb %01100110 0376 66 ( 8x8.fcb):00792 fcb %01100110 0377 7C ( 8x8.fcb):00793 fcb %01111100 0378 00 ( 8x8.fcb):00794 fcb %00000000 0379 00 ( 8x8.fcb):00795 fcb %00000000 ( 8x8.fcb):00796 ( 8x8.fcb):00797 ; 'c' 037A 00 ( 8x8.fcb):00798 fcb %00000000 037B 00 ( 8x8.fcb):00799 fcb %00000000 037C 3C ( 8x8.fcb):00800 fcb %00111100 037D 60 ( 8x8.fcb):00801 fcb %01100000 037E 60 ( 8x8.fcb):00802 fcb %01100000 037F 3C ( 8x8.fcb):00803 fcb %00111100 0380 00 ( 8x8.fcb):00804 fcb %00000000 0381 00 ( 8x8.fcb):00805 fcb %00000000 ( 8x8.fcb):00806 ( 8x8.fcb):00807 ; 'd' 0382 00 ( 8x8.fcb):00808 fcb %00000000 0383 06 ( 8x8.fcb):00809 fcb %00000110 0384 3E ( 8x8.fcb):00810 fcb %00111110 0385 66 ( 8x8.fcb):00811 fcb %01100110 0386 66 ( 8x8.fcb):00812 fcb %01100110 0387 3E ( 8x8.fcb):00813 fcb %00111110 0388 00 ( 8x8.fcb):00814 fcb %00000000 0389 00 ( 8x8.fcb):00815 fcb %00000000 ( 8x8.fcb):00816 ( 8x8.fcb):00817 ; 'e' 038A 00 ( 8x8.fcb):00818 fcb %00000000 038B 00 ( 8x8.fcb):00819 fcb %00000000 038C 3C ( 8x8.fcb):00820 fcb %00111100 038D 66 ( 8x8.fcb):00821 fcb %01100110 038E 7C ( 8x8.fcb):00822 fcb %01111100 038F 1E ( 8x8.fcb):00823 fcb %00011110 0390 00 ( 8x8.fcb):00824 fcb %00000000 0391 00 ( 8x8.fcb):00825 fcb %00000000 ( 8x8.fcb):00826 ( 8x8.fcb):00827 ; 'f' 0392 00 ( 8x8.fcb):00828 fcb %00000000 0393 0E ( 8x8.fcb):00829 fcb %00001110 0394 18 ( 8x8.fcb):00830 fcb %00011000 0395 3E ( 8x8.fcb):00831 fcb %00111110 0396 18 ( 8x8.fcb):00832 fcb %00011000 0397 18 ( 8x8.fcb):00833 fcb %00011000 0398 00 ( 8x8.fcb):00834 fcb %00000000 0399 00 ( 8x8.fcb):00835 fcb %00000000 ( 8x8.fcb):00836 if 0 ( 8x8.fcb):00837 ( 8x8.fcb):00838 ; 'g' ( 8x8.fcb):00839 fcb %00000000 ( 8x8.fcb):00840 fcb %00000000 ( 8x8.fcb):00841 fcb %00111100 ( 8x8.fcb):00842 fcb %01100110 ( 8x8.fcb):00843 fcb %01100110 ( 8x8.fcb):00844 fcb %00111110 ( 8x8.fcb):00845 fcb %00000110 ( 8x8.fcb):00846 fcb %01111100 ( 8x8.fcb):00847 endif ( 8x8.fcb):00848 ; 'e' 039A 00 ( 8x8.fcb):00849 fcb %00000000 039B 00 ( 8x8.fcb):00850 fcb %00000000 039C 3C ( 8x8.fcb):00851 fcb %00111100 039D 66 ( 8x8.fcb):00852 fcb %01100110 039E 66 ( 8x8.fcb):00853 fcb %01100110 039F 3E ( 8x8.fcb):00854 fcb %00111110 03A0 7C ( 8x8.fcb):00855 fcb %01111100 03A1 00 ( 8x8.fcb):00856 fcb %00000000 ( 8x8.fcb):00857 ( 8x8.fcb):00858 ; 'h' 03A2 00 ( 8x8.fcb):00859 fcb %00000000 03A3 60 ( 8x8.fcb):00860 fcb %01100000 03A4 7C ( 8x8.fcb):00861 fcb %01111100 03A5 66 ( 8x8.fcb):00862 fcb %01100110 03A6 66 ( 8x8.fcb):00863 fcb %01100110 03A7 66 ( 8x8.fcb):00864 fcb %01100110 03A8 00 ( 8x8.fcb):00865 fcb %00000000 03A9 00 ( 8x8.fcb):00866 fcb %00000000 ( 8x8.fcb):00867 ( 8x8.fcb):00868 ; 'i' 03AA 18 ( 8x8.fcb):00869 fcb %00011000 03AB 00 ( 8x8.fcb):00870 fcb %00000000 03AC 38 ( 8x8.fcb):00871 fcb %00111000 03AD 18 ( 8x8.fcb):00872 fcb %00011000 03AE 18 ( 8x8.fcb):00873 fcb %00011000 03AF 3C ( 8x8.fcb):00874 fcb %00111100 03B0 00 ( 8x8.fcb):00875 fcb %00000000 03B1 00 ( 8x8.fcb):00876 fcb %00000000 ( 8x8.fcb):00877 ( 8x8.fcb):00878 ; 'j' 03B2 06 ( 8x8.fcb):00879 fcb %00000110 03B3 00 ( 8x8.fcb):00880 fcb %00000000 03B4 0E ( 8x8.fcb):00881 fcb %00001110 03B5 06 ( 8x8.fcb):00882 fcb %00000110 03B6 36 ( 8x8.fcb):00883 fcb %00110110 03B7 1C ( 8x8.fcb):00884 fcb %00011100 03B8 00 ( 8x8.fcb):00885 fcb %00000000 03B9 00 ( 8x8.fcb):00886 fcb %00000000 ( 8x8.fcb):00887 ( 8x8.fcb):00888 ; 'k' 03BA 00 ( 8x8.fcb):00889 fcb %00000000 03BB 60 ( 8x8.fcb):00890 fcb %01100000 03BC 6C ( 8x8.fcb):00891 fcb %01101100 03BD 78 ( 8x8.fcb):00892 fcb %01111000 03BE 6C ( 8x8.fcb):00893 fcb %01101100 03BF 66 ( 8x8.fcb):00894 fcb %01100110 03C0 00 ( 8x8.fcb):00895 fcb %00000000 03C1 00 ( 8x8.fcb):00896 fcb %00000000 ( 8x8.fcb):00897 ( 8x8.fcb):00898 ; 'l' 03C2 00 ( 8x8.fcb):00899 fcb %00000000 03C3 38 ( 8x8.fcb):00900 fcb %00111000 03C4 18 ( 8x8.fcb):00901 fcb %00011000 03C5 18 ( 8x8.fcb):00902 fcb %00011000 03C6 18 ( 8x8.fcb):00903 fcb %00011000 03C7 3C ( 8x8.fcb):00904 fcb %00111100 03C8 00 ( 8x8.fcb):00905 fcb %00000000 03C9 00 ( 8x8.fcb):00906 fcb %00000000 ( 8x8.fcb):00907 ( 8x8.fcb):00908 ; 'm' 03CA 00 ( 8x8.fcb):00909 fcb %00000000 03CB 00 ( 8x8.fcb):00910 fcb %00000000 03CC 66 ( 8x8.fcb):00911 fcb %01100110 03CD 7F ( 8x8.fcb):00912 fcb %01111111 03CE 7F ( 8x8.fcb):00913 fcb %01111111 03CF 6B ( 8x8.fcb):00914 fcb %01101011 03D0 00 ( 8x8.fcb):00915 fcb %00000000 03D1 00 ( 8x8.fcb):00916 fcb %00000000 ( 8x8.fcb):00917 ( 8x8.fcb):00918 ; 'n' 03D2 00 ( 8x8.fcb):00919 fcb %00000000 03D3 00 ( 8x8.fcb):00920 fcb %00000000 03D4 7C ( 8x8.fcb):00921 fcb %01111100 03D5 66 ( 8x8.fcb):00922 fcb %01100110 03D6 66 ( 8x8.fcb):00923 fcb %01100110 03D7 66 ( 8x8.fcb):00924 fcb %01100110 03D8 00 ( 8x8.fcb):00925 fcb %00000000 03D9 00 ( 8x8.fcb):00926 fcb %00000000 ( 8x8.fcb):00927 ( 8x8.fcb):00928 ; 'o' 03DA 00 ( 8x8.fcb):00929 fcb %00000000 03DB 00 ( 8x8.fcb):00930 fcb %00000000 03DC 3C ( 8x8.fcb):00931 fcb %00111100 03DD 66 ( 8x8.fcb):00932 fcb %01100110 03DE 66 ( 8x8.fcb):00933 fcb %01100110 03DF 3C ( 8x8.fcb):00934 fcb %00111100 03E0 00 ( 8x8.fcb):00935 fcb %00000000 03E1 00 ( 8x8.fcb):00936 fcb %00000000 ( 8x8.fcb):00937 ( 8x8.fcb):00938 ; 'p' 03E2 00 ( 8x8.fcb):00939 fcb %00000000 03E3 00 ( 8x8.fcb):00940 fcb %00000000 03E4 7C ( 8x8.fcb):00941 fcb %01111100 03E5 66 ( 8x8.fcb):00942 fcb %01100110 03E6 66 ( 8x8.fcb):00943 fcb %01100110 03E7 7C ( 8x8.fcb):00944 fcb %01111100 03E8 60 ( 8x8.fcb):00945 fcb %01100000 03E9 00 ( 8x8.fcb):00946 fcb %00000000 ( 8x8.fcb):00947 ( 8x8.fcb):00948 ; 'q' 03EA 00 ( 8x8.fcb):00949 fcb %00000000 03EB 00 ( 8x8.fcb):00950 fcb %00000000 03EC 3E ( 8x8.fcb):00951 fcb %00111110 03ED 66 ( 8x8.fcb):00952 fcb %01100110 03EE 66 ( 8x8.fcb):00953 fcb %01100110 03EF 3E ( 8x8.fcb):00954 fcb %00111110 03F0 06 ( 8x8.fcb):00955 fcb %00000110 03F1 00 ( 8x8.fcb):00956 fcb %00000000 ( 8x8.fcb):00957 ( 8x8.fcb):00958 ; 'r' 03F2 00 ( 8x8.fcb):00959 fcb %00000000 03F3 00 ( 8x8.fcb):00960 fcb %00000000 03F4 7C ( 8x8.fcb):00961 fcb %01111100 03F5 66 ( 8x8.fcb):00962 fcb %01100110 03F6 60 ( 8x8.fcb):00963 fcb %01100000 03F7 60 ( 8x8.fcb):00964 fcb %01100000 03F8 00 ( 8x8.fcb):00965 fcb %00000000 03F9 00 ( 8x8.fcb):00966 fcb %00000000 ( 8x8.fcb):00967 ( 8x8.fcb):00968 ; 's' 03FA 00 ( 8x8.fcb):00969 fcb %00000000 03FB 00 ( 8x8.fcb):00970 fcb %00000000 03FC 3E ( 8x8.fcb):00971 fcb %00111110 03FD 78 ( 8x8.fcb):00972 fcb %01111000 03FE 1E ( 8x8.fcb):00973 fcb %00011110 03FF 7C ( 8x8.fcb):00974 fcb %01111100 0400 00 ( 8x8.fcb):00975 fcb %00000000 0401 00 ( 8x8.fcb):00976 fcb %00000000 ( 8x8.fcb):00977 ( 8x8.fcb):00978 ; 't' 0402 00 ( 8x8.fcb):00979 fcb %00000000 0403 18 ( 8x8.fcb):00980 fcb %00011000 0404 7E ( 8x8.fcb):00981 fcb %01111110 0405 18 ( 8x8.fcb):00982 fcb %00011000 0406 18 ( 8x8.fcb):00983 fcb %00011000 0407 0E ( 8x8.fcb):00984 fcb %00001110 0408 00 ( 8x8.fcb):00985 fcb %00000000 0409 00 ( 8x8.fcb):00986 fcb %00000000 ( 8x8.fcb):00987 ( 8x8.fcb):00988 ; 'u' 040A 00 ( 8x8.fcb):00989 fcb %00000000 040B 00 ( 8x8.fcb):00990 fcb %00000000 040C 66 ( 8x8.fcb):00991 fcb %01100110 040D 66 ( 8x8.fcb):00992 fcb %01100110 040E 66 ( 8x8.fcb):00993 fcb %01100110 040F 3E ( 8x8.fcb):00994 fcb %00111110 0410 00 ( 8x8.fcb):00995 fcb %00000000 0411 00 ( 8x8.fcb):00996 fcb %00000000 ( 8x8.fcb):00997 ( 8x8.fcb):00998 ; 'v' 0412 00 ( 8x8.fcb):00999 fcb %00000000 0413 00 ( 8x8.fcb):01000 fcb %00000000 0414 66 ( 8x8.fcb):01001 fcb %01100110 0415 66 ( 8x8.fcb):01002 fcb %01100110 0416 3C ( 8x8.fcb):01003 fcb %00111100 0417 18 ( 8x8.fcb):01004 fcb %00011000 0418 00 ( 8x8.fcb):01005 fcb %00000000 0419 00 ( 8x8.fcb):01006 fcb %00000000 ( 8x8.fcb):01007 ( 8x8.fcb):01008 ; 'w' 041A 00 ( 8x8.fcb):01009 fcb %00000000 041B 00 ( 8x8.fcb):01010 fcb %00000000 041C 6B ( 8x8.fcb):01011 fcb %01101011 041D 7F ( 8x8.fcb):01012 fcb %01111111 041E 3E ( 8x8.fcb):01013 fcb %00111110 041F 36 ( 8x8.fcb):01014 fcb %00110110 0420 00 ( 8x8.fcb):01015 fcb %00000000 0421 00 ( 8x8.fcb):01016 fcb %00000000 ( 8x8.fcb):01017 ( 8x8.fcb):01018 ; 'x' 0422 00 ( 8x8.fcb):01019 fcb %00000000 0423 00 ( 8x8.fcb):01020 fcb %00000000 0424 66 ( 8x8.fcb):01021 fcb %01100110 0425 3C ( 8x8.fcb):01022 fcb %00111100 0426 3C ( 8x8.fcb):01023 fcb %00111100 0427 66 ( 8x8.fcb):01024 fcb %01100110 0428 00 ( 8x8.fcb):01025 fcb %00000000 0429 00 ( 8x8.fcb):01026 fcb %00000000 ( 8x8.fcb):01027 ( 8x8.fcb):01028 ; 'y' 042A 00 ( 8x8.fcb):01029 fcb %00000000 042B 00 ( 8x8.fcb):01030 fcb %00000000 042C 66 ( 8x8.fcb):01031 fcb %01100110 042D 66 ( 8x8.fcb):01032 fcb %01100110 042E 66 ( 8x8.fcb):01033 fcb %01100110 042F 3E ( 8x8.fcb):01034 fcb %00111110 ( 8x8.fcb):01035 ; fcb %00000110 0430 7C ( 8x8.fcb):01036 fcb %01111100 0431 00 ( 8x8.fcb):01037 fcb %00000000 ( 8x8.fcb):01038 ( 8x8.fcb):01039 ; 'z' 0432 00 ( 8x8.fcb):01040 fcb %00000000 0433 00 ( 8x8.fcb):01041 fcb %00000000 0434 7F ( 8x8.fcb):01042 fcb %01111111 0435 0E ( 8x8.fcb):01043 fcb %00001110 0436 38 ( 8x8.fcb):01044 fcb %00111000 0437 7F ( 8x8.fcb):01045 fcb %01111111 0438 00 ( 8x8.fcb):01046 fcb %00000000 0439 00 ( 8x8.fcb):01047 fcb %00000000 ( 8x8.fcb):01048 ( 8x8.fcb):01049 ; '{' 043A 1C ( 8x8.fcb):01050 fcb %00011100 043B 30 ( 8x8.fcb):01051 fcb %00110000 043C 30 ( 8x8.fcb):01052 fcb %00110000 043D 60 ( 8x8.fcb):01053 fcb %01100000 043E 30 ( 8x8.fcb):01054 fcb %00110000 043F 30 ( 8x8.fcb):01055 fcb %00110000 0440 1C ( 8x8.fcb):01056 fcb %00011100 0441 00 ( 8x8.fcb):01057 fcb %00000000 ( 8x8.fcb):01058 ( 8x8.fcb):01059 ; '|' 0442 00 ( 8x8.fcb):01060 fcb %00000000 0443 18 ( 8x8.fcb):01061 fcb %00011000 0444 18 ( 8x8.fcb):01062 fcb %00011000 0445 18 ( 8x8.fcb):01063 fcb %00011000 0446 18 ( 8x8.fcb):01064 fcb %00011000 0447 18 ( 8x8.fcb):01065 fcb %00011000 0448 00 ( 8x8.fcb):01066 fcb %00000000 0449 00 ( 8x8.fcb):01067 fcb %00000000 ( 8x8.fcb):01068 ( 8x8.fcb):01069 ; '}' 044A 38 ( 8x8.fcb):01070 fcb %00111000 044B 0C ( 8x8.fcb):01071 fcb %00001100 044C 0C ( 8x8.fcb):01072 fcb %00001100 044D 06 ( 8x8.fcb):01073 fcb %00000110 044E 0C ( 8x8.fcb):01074 fcb %00001100 044F 0C ( 8x8.fcb):01075 fcb %00001100 0450 38 ( 8x8.fcb):01076 fcb %00111000 0451 00 ( 8x8.fcb):01077 fcb %00000000 ( 8x8.fcb):01078 ( 8x8.fcb):01079 ; '~' 0452 00 ( 8x8.fcb):01080 fcb %00000000 0453 3B ( 8x8.fcb):01081 fcb %00111011 0454 6E ( 8x8.fcb):01082 fcb %01101110 0455 00 ( 8x8.fcb):01083 fcb %00000000 0456 00 ( 8x8.fcb):01084 fcb %00000000 0457 00 ( 8x8.fcb):01085 fcb %00000000 0458 00 ( 8x8.fcb):01086 fcb %00000000 0459 00 ( 8x8.fcb):01087 fcb %00000000 ( 8x8.fcb):01088 ( 8x8.fcb):01089 ; '' 045A 0C ( 8x8.fcb):01090 fcb %00001100 045B 33 ( 8x8.fcb):01091 fcb %00110011 045C 0C ( 8x8.fcb):01092 fcb %00001100 045D 33 ( 8x8.fcb):01093 fcb %00110011 045E 0C ( 8x8.fcb):01094 fcb %00001100 045F 33 ( 8x8.fcb):01095 fcb %00110011 0460 0C ( 8x8.fcb):01096 fcb %00001100 0461 33 ( 8x8.fcb):01097 fcb %00110011 ( 8x8.fcb):01098 ( go.asm):00146 0462 F9331B ( go.asm):00147 emod 0465 ( go.asm):00148 eom equ * ( go.asm):00149 end